The OMAP WDT IP block requires to be stopped before any write to its registers is performed.
This problem has been thoroughly described in Linux kernel:
"watchdog: omap: assert the counter being stopped before reprogramming: SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453
Signed-off-by: Lukasz Majewski lukma@denx.de --- drivers/watchdog/omap_wdt.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 7ea4b60..7b1f429 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c @@ -81,10 +81,32 @@ static int omap_wdt_set_timeout(unsigned int timeout) return 0; }
+void hw_watchdog_disable(void) +{ + struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; + + /* + * Disable watchdog + */ + writel(0xAAAA, &wdt->wdtwspr); + while (readl(&wdt->wdtwwps) != 0x0) + ; + writel(0x5555, &wdt->wdtwspr); + while (readl(&wdt->wdtwwps) != 0x0) + ; +} + void hw_watchdog_init(void) { struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
+ /* + * Make sure the watchdog is disabled. This is unfortunately required + * because writing to various registers with the watchdog running has no + * effect. + */ + hw_watchdog_disable(); + /* initialize prescaler */ while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WCLR) ; @@ -104,18 +126,3 @@ void hw_watchdog_init(void) while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR) ; } - -void hw_watchdog_disable(void) -{ - struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; - - /* - * Disable watchdog - */ - writel(0xAAAA, &wdt->wdtwspr); - while (readl(&wdt->wdtwwps) != 0x0) - ; - writel(0x5555, &wdt->wdtwspr); - while (readl(&wdt->wdtwwps) != 0x0) - ; -}