On 2015-02-17 22:05, Stephen Warren wrote:
On 02/16/2015 05:54 AM, Jan Kiszka wrote:
The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. See next patch.
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
+#define CONFIG_ARMV7_PSCI 1 +/* Reserve top 1M for secure RAM */ +#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
Can that not be dynamic? What if the system only has 1GB RAM not 2GB. It's true that all shipped/public versions of this board do have 2GB AFAIK, but we have had internal versions with different amounts of RAM, and I don't think there's anything else in Tegra U-Boots that hard-codes RAM sizes.
I tested and checked the PSCI code again, and it turned out to be not position independent yet (vector tables, functions pointers). Everything can be fixed, but I wonder if this shouldn't be done on top, when we have a concrete need.
Locating the monitor may involve more factors on different SoCs and boards. So a general solution may be more complicated, even when dynamic relocation itself is solved.
Jan