The SPL stack is usually located at the end of SRAM A1, where it grows towards the end of the SPL. For the really big AArch64 binaries the stack overwrites code pretty soon, so move the SPL stack to the end of SRAM A2, which is unused at this time.
Signed-off-by: Andre Przywara andre.przywara@arm.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Maxime Ripard maxime.ripard@free-electrons.com --- include/configs/sunxi-common.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 64a1900..6b56776 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -187,7 +187,12 @@ #ifdef CONFIG_SUNXI_HIGH_SRAM #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */ +#ifdef CONFIG_ARM64 +/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ +#define LOW_LEVEL_SRAM_STACK 0x00054000 +#else #define LOW_LEVEL_SRAM_STACK 0x00018000 +#endif /* !CONFIG_ARM64 */ #else #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */