Re: [U-Boot] [U-Boot, 5/7] clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock

14 Mar 2018


      On Thu, Feb 08, 2018 at 05:20:49PM +0100, patrice.chotard@st.com wrote:
...
From: Patrice Chotard patrice.chotard@st.com
Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.
PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.
Signed-off-by: Patrice Chotard patrice.chotard@st.com
Applied to u-boot/master, thanks!
-- 
Tom

Re: [U-Boot] [U-Boot, 5/7] clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock

Tom Rini