Add defconfig for N5X to support legacy, ATF and VAB boot flow.
Signed-off-by: Siew Chin Lim elly.siew.chin.lim@intel.com --- arch/arm/mach-socfpga/Kconfig | 21 +++++++++++++++- arch/arm/mach-socfpga/Makefile | 28 ++++++++++++++++++---- ...lex_vab_defconfig => socfpga_n5x_atf_defconfig} | 12 +++++----- ...fpga_agilex_defconfig => socfpga_n5x_defconfig} | 13 +++++----- ...lex_vab_defconfig => socfpga_n5x_vab_defconfig} | 11 +++++---- 5 files changed, 61 insertions(+), 24 deletions(-) copy configs/{socfpga_agilex_vab_defconfig => socfpga_n5x_atf_defconfig} (87%) copy configs/{socfpga_agilex_defconfig => socfpga_n5x_defconfig} (83%) copy configs/{socfpga_agilex_vab_defconfig => socfpga_n5x_vab_defconfig} (87%)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 0c35406232..f4791c1ebe 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -8,7 +8,7 @@ config NR_DRAM_BANKS
config SOCFPGA_SECURE_VAB_AUTH bool "Enable boot image authentication with Secure Device Manager" - depends on TARGET_SOCFPGA_AGILEX + depends on TARGET_SOCFPGA_AGILEX || TARGET_SOCFPGA_N5X select FIT_IMAGE_POST_PROCESS select SHA384 select SHA512_ALGO @@ -91,6 +91,22 @@ config TARGET_SOCFPGA_GEN5 imply SPL_SYS_MALLOC_SIMPLE imply SPL_USE_TINY_PRINTF
+config TARGET_SOCFPGA_N5X + bool + select ARMV8_MULTIENTRY + select ARMV8_SET_SMPEN + select BINMAN if SPL_ATF + select CLK + select FPGA_INTEL_SDM_MAILBOX + select NCORE_CACHE + select SPL_ALTERA_SDRAM + select SPL_CLK if SPL + select TARGET_SOCFPGA_SOC64 + +config TARGET_SOCFPGA_N5X_SOCDK + bool "Intel eASIC SoCDK (N5X)" + select TARGET_SOCFPGA_N5X + config TARGET_SOCFPGA_SOC64 bool
@@ -185,6 +201,7 @@ config SYS_BOARD default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO default "is1" if TARGET_SOCFPGA_IS1 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK + default "n5x-socdk" if TARGET_SOCFPGA_N5X_SOCDK default "secu1" if TARGET_SOCFPGA_ARRIA5_SECU1 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES @@ -194,6 +211,7 @@ config SYS_BOARD
config SYS_VENDOR default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK + default "intel" if TARGET_SOCFPGA_N5X_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK @@ -223,6 +241,7 @@ config SYS_CONFIG_NAME default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO default "socfpga_is1" if TARGET_SOCFPGA_IS1 default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK + default "socfpga_n5x_socdk" if TARGET_SOCFPGA_N5X_SOCDK default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 58afde950f..ec38b64dd4 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -4,7 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # Copyright (C) 2012-2017 Altera Corporation <www.altera.com> -# Copyright (C) 2017-2020 Intel Corporation <www.intel.com> +# Copyright (C) 2017-2021 Intel Corporation <www.intel.com>
obj-y += board.o obj-y += clock_manager.o @@ -56,6 +56,21 @@ obj-y += wrap_handoff_soc64.o obj-y += wrap_pll_config_soc64.o endif
+ifdef CONFIG_TARGET_SOCFPGA_N5X +obj-y += clock_manager_n5x.o +obj-y += lowlevel_init_soc64.o +obj-y += mailbox_s10.o +obj-y += misc_soc64.o +obj-y += mmu-arm64_s10.o +obj-y += reset_manager_s10.o +obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o +obj-y += system_manager_soc64.o +obj-y += timer_s10.o +obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o +obj-y += wrap_handoff_soc64.o +obj-y += wrap_pll_config_soc64.o +endif + ifdef CONFIG_SPL_BUILD ifdef CONFIG_TARGET_SOCFPGA_GEN5 obj-y += spl_gen5.o @@ -64,18 +79,21 @@ obj-y += wrap_iocsr_config.o obj-y += wrap_pinmux_config.o obj-y += wrap_sdram_config.o endif +ifdef CONFIG_TARGET_SOCFPGA_SOC64 +obj-y += firewall.o +obj-y += spl_soc64.o +endif ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 obj-y += spl_a10.o endif ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 -obj-y += firewall.o obj-y += spl_s10.o -obj-y += spl_soc64.o endif ifdef CONFIG_TARGET_SOCFPGA_AGILEX -obj-y += firewall.o obj-y += spl_agilex.o -obj-y += spl_soc64.o +endif +ifdef CONFIG_TARGET_SOCFPGA_N5X +obj-y += spl_n5x.o endif else obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_n5x_atf_defconfig similarity index 87% copy from configs/socfpga_agilex_vab_defconfig copy to configs/socfpga_n5x_atf_defconfig index d494528a58..a584537439 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -8,11 +8,10 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 -CONFIG_SOCFPGA_SECURE_VAB_AUTH=y -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y @@ -21,7 +20,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_CRC32=y @@ -30,7 +29,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -44,6 +43,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_n5x_defconfig similarity index 83% copy from configs/socfpga_agilex_defconfig copy to configs/socfpga_n5x_defconfig index 15713ee6db..00d2a8cbde 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -3,27 +3,25 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -37,6 +35,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_n5x_vab_defconfig similarity index 87% copy from configs/socfpga_agilex_vab_defconfig copy to configs/socfpga_n5x_vab_defconfig index d494528a58..18021e0341 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -8,11 +8,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y -CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y -CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y +CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y @@ -21,7 +21,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon" +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_CRC32=y @@ -30,7 +30,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -44,6 +44,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y