This converts the following to Kconfig: CONFIG_PHY_RESET_DELAY
Cc: Ramon Fried rfried.dev@gmail.com Signed-off-by: Tom Rini trini@konsulko.com --- README | 7 ------- arch/arm/include/asm/arch-bcmcygnus/configs.h | 3 --- common/miiphyutil.c | 2 +- configs/bcm968380gerg_ram_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 1 + configs/comtrend_ar5387un_ram_defconfig | 1 + configs/comtrend_ct5361_ram_defconfig | 1 + configs/comtrend_vr3032u_ram_defconfig | 1 + configs/comtrend_wap5813n_ram_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 1 + configs/netgear_cg3100d_ram_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 1 + configs/sagem_f@st1704_ram_defconfig | 1 + configs/sfr_nb4-ser_ram_defconfig | 1 + configs/stv0991_defconfig | 1 + drivers/net/phy/Kconfig | 8 ++++++++ drivers/net/phy/phy.c | 2 +- include/configs/bmips_common.h | 3 --- include/configs/stv0991.h | 3 --- 19 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/README b/README index effaef5574c3..0072e03b6313 100644 --- a/README +++ b/README @@ -1075,13 +1075,6 @@ The following options need to be configured:
The clock frequency of the MII bus
- CONFIG_PHY_RESET_DELAY - - Some PHY like Intel LXT971A need extra delay after - reset before any MII register access is possible. - For such PHY, set this option to the usec delay - required. (minimum 300usec for LXT971A) - CONFIG_PHY_CMD_DELAY (ppc4xx)
Some PHY like Intel LXT971A need extra delay after diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h index 27f30d1d2e20..327c0e06977b 100644 --- a/arch/arm/include/asm/arch-bcmcygnus/configs.h +++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h @@ -19,7 +19,4 @@ #define CONFIG_SYS_NS16550_CLK_DIV 54 #define CONFIG_SYS_NS16550_COM3 0x18023000
-/* Ethernet */ -#define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/ - #endif /* __ARCH_CONFIGS_H */ diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 7d4d15ed9189..194c84e7e89d 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -366,7 +366,7 @@ int miiphy_reset(const char *devname, unsigned char addr) debug("PHY reset failed\n"); return -1; } -#ifdef CONFIG_PHY_RESET_DELAY +#if CONFIG_PHY_RESET_DELAY > 0 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ #endif /* diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index 7eb23bdc62b7..95cce92e9263 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -49,6 +49,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_BRCMNAND=y CONFIG_NAND_BRCMNAND_6838=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_PINCTRL=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 45e8b765837a..9268aea02ab1 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -50,6 +50,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 5a944483d062..9d2fc0cbf1c3 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -50,6 +50,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 6290b2a72080..ddb12508bf80 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 35bc13964e74..b2973fa0f340 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -52,6 +52,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_BRCMNAND=y CONFIG_NAND_BRCMNAND_6368=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index a2e5f9648c6b..5ad85b10f500 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -50,6 +50,7 @@ CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_BCM6368_ETH=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 977450e351e1..261e1bf693df 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index b961b58ac394..869d4c8e4e33 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -45,6 +45,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index c3e626c9c34b..8649f0ecd9ff 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -47,6 +47,7 @@ CONFIG_LED=y CONFIG_LED_BCM6328=y CONFIG_LED_BLINK=y CONFIG_LED_GPIO=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_BCM6368_ETH=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index ac906a9dcf81..9ac5dbaae14c 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -49,6 +49,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_DM_RESET=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 5caad90fe915..e97c1f06bd79 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index fa1ae108385b..7b40329405c9 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -35,6 +35,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_PHY_RESET_DELAY=10000 CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_CADENCE_QSPI=y diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 74339a25ca53..eed6eb186692 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -330,3 +330,11 @@ config PHY_NCSI depends on DM_ETH
endif #PHYLIB + +config PHY_RESET_DELAY + int "Extra delay after reset before MII register access" + default 0 + help + Some PHYs need extra delay after reset before any MII register access + is possible. For such PHY, set this option to the usec delay + required. diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index fffa10f68b3c..92fff5b72c0c 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -872,7 +872,7 @@ int phy_reset(struct phy_device *phydev) return -1; }
-#ifdef CONFIG_PHY_RESET_DELAY +#if CONFIG_PHY_RESET_DELAY > 0 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ #endif /* diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 57de99609562..0c357dea9d3b 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -8,9 +8,6 @@
#include <linux/sizes.h>
-/* ETH */ -#define CONFIG_PHY_RESET_DELAY 20 - /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index dd9421687638..feec8695f2ee 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -29,9 +29,6 @@
#define CONFIG_DW_ALTDESCRIPTOR
-/* Command support defines */ -#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ - /* Misc configuration */
/*