Update the driver model support, and remove the old code. Change snow to use this new support.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v3: None Changes in v2: - Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec_i2c.c | 107 +++++++++++++++++---------------------------- include/configs/snow.h | 5 +++ 2 files changed, 45 insertions(+), 67 deletions(-)
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c index 513cdb1..c9d1b49 100644 --- a/drivers/misc/cros_ec_i2c.c +++ b/drivers/misc/cros_ec_i2c.c @@ -14,20 +14,16 @@ */
#include <common.h> +#include <dm.h> +#include <errno.h> #include <i2c.h> #include <cros_ec.h>
-#ifdef DEBUG_TRACE -#define debug_trace(fmt, b...) debug(fmt, #b) -#else -#define debug_trace(fmt, b...) -#endif - -int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, +int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd, int cmd_version, const uint8_t *dout, int dout_len, uint8_t **dinp, int din_len) { - int old_bus = 0; + struct cros_ec_dev *dev = udev->uclass_priv; /* version8, cmd8, arglen8, out8[dout_len], csum8 */ int out_bytes = dout_len + 4; /* response8, arglen8, in8[din_len], checksum8 */ @@ -37,19 +33,17 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, uint8_t *in_ptr; int len, csum, ret;
- old_bus = i2c_get_bus_num(); - /* * Sanity-check I/O sizes given transaction overhead in internal * buffers. */ if (out_bytes > sizeof(dev->dout)) { debug("%s: Cannot send %d bytes\n", __func__, dout_len); - return -1; + return -ENOSPC; } if (in_bytes > sizeof(dev->din)) { debug("%s: Cannot receive %d bytes\n", __func__, din_len); - return -1; + return -ENOSPC; } assert(dout_len >= 0); assert(dinp); @@ -72,7 +66,7 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, /* Something we don't support */ debug("%s: Protocol version %d unsupported\n", __func__, dev->protocol_version); - return -1; + return -EPROTONOSUPPORT; }
*ptr++ = EC_CMD_VERSION0 + cmd_version; @@ -86,36 +80,18 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, *ptr++ = (uint8_t) cros_ec_calc_checksum(dev->dout, dout_len + 3);
- /* Set to the proper i2c bus */ - if (i2c_set_bus_num(dev->bus_num)) { - debug("%s: Cannot change to I2C bus %d\n", __func__, - dev->bus_num); - return -1; - } - /* Send output data */ cros_ec_dump_data("out", -1, dev->dout, out_bytes); - ret = i2c_write(dev->addr, 0, 0, dev->dout, out_bytes); - if (ret) { - debug("%s: Cannot complete I2C write to 0x%x\n", - __func__, dev->addr); - ret = -1; - } + ret = dm_i2c_write(udev, 0, dev->dout, out_bytes); + if (ret) + debug("%s: Cannot complete I2C write\n", udev->name);
if (!ret) { - ret = i2c_read(dev->addr, 0, 0, in_ptr, in_bytes); - if (ret) { - debug("%s: Cannot complete I2C read from 0x%x\n", - __func__, dev->addr); - ret = -1; - } + ret = dm_i2c_read(udev, 0, in_ptr, in_bytes); + if (ret) + debug("%s: Cannot complete I2C read\n", udev->name); }
- /* Return to original bus number */ - i2c_set_bus_num(old_bus); - if (ret) - return ret; - if (*in_ptr != EC_RES_SUCCESS) { debug("%s: Received bad result code %d\n", __func__, *in_ptr); return -(int)*in_ptr; @@ -125,13 +101,13 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, if (len + 3 > sizeof(dev->din)) { debug("%s: Received length %#02x too large\n", __func__, len); - return -1; + return -ENOSPC; } csum = cros_ec_calc_checksum(in_ptr, 2 + len); if (csum != in_ptr[2 + len]) { debug("%s: Invalid checksum rx %#02x, calced %#02x\n", __func__, in_ptr[2 + din_len], csum); - return -1; + return -EBADMSG; } din_len = min(din_len, len); cros_ec_dump_data("in", -1, in_ptr, din_len + 3); @@ -142,35 +118,32 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, return din_len; }
-int cros_ec_i2c_decode_fdt(struct cros_ec_dev *dev, const void *blob) +static int cros_ec_probe(struct udevice *dev) { - /* Decode interface-specific FDT params */ - dev->max_frequency = fdtdec_get_int(blob, dev->node, - "i2c-max-frequency", 100000); - dev->bus_num = i2c_get_bus_num_fdt(dev->parent_node); - if (dev->bus_num == -1) { - debug("%s: Failed to read bus number\n", __func__); - return -1; - } - dev->addr = fdtdec_get_int(blob, dev->node, "reg", -1); - if (dev->addr == -1) { - debug("%s: Failed to read device address\n", __func__); - return -1; - } + struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
- return 0; + /* + * The EC does not use register offsets. This might be better done + * with a device tree property, like "i2c-offset-len = <0>" but for + * now this works. + */ + plat->offset_len = 0; + return cros_ec_register(dev); }
-/** - * Initialize I2C protocol. - * - * @param dev CROS_EC device - * @param blob Device tree blob - * @return 0 if ok, -1 on error - */ -int cros_ec_i2c_init(struct cros_ec_dev *dev, const void *blob) -{ - i2c_init(dev->max_frequency, dev->addr); - - return 0; -} +static struct dm_cros_ec_ops cros_ec_ops = { + .command = cros_ec_i2c_command, +}; + +static const struct udevice_id cros_ec_ids[] = { + { .compatible = "google,cros-ec" }, + { } +}; + +U_BOOT_DRIVER(cros_ec_i2c) = { + .name = "cros_ec", + .id = UCLASS_CROS_EC, + .of_match = cros_ec_ids, + .probe = cros_ec_probe, + .ops = &cros_ec_ops, +}; diff --git a/include/configs/snow.h b/include/configs/snow.h index 7eaa586..3e5a5d3 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -16,12 +16,17 @@ #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) #define CONFIG_SPI_BOOTING
+#define CONFIG_DM_I2C + #include <configs/exynos5250-common.h> #include <configs/exynos5-dt-common.h>
#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */ #define CONFIG_POWER_TPS65090_I2C +#define CONFIG_DM_CROS_EC +#define CONFIG_DM_I2C_COMPAT +#undef CONFIG_SYS_I2C
#define CONFIG_BOARD_COMMON #define CONFIG_ARCH_EARLY_INIT_R