Hi Tim
Il gio 14 apr 2022, 20:33 Tim Harvey tharvey@gateworks.com ha scritto:
On Thu, Apr 14, 2022 at 11:02 AM Michael Nazzareno Trimarchi michael@amarulasolutions.com wrote:
HI Tim
On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey tharvey@gateworks.com
wrote:
Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux are already marked with u-boot,dm-spl but we need to move the call to preloader_console_init() after spl_early_init() to avoid a board hang as dm can't be used until after spl_early_init().
Remove the manual config of the UART pinmux now that it is no longer needed.
Signed-off-by: Tim Harvey tharvey@gateworks.com Cc: Michael Nazzareno Trimarchi michael@amarulasolutions.com
v3: enable DM_SERIAL for SPL as well per Michael's suggestion v2: rebase on imx/master
board/gateworks/venice/spl.c | 17 ++--------------- configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + 3 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/board/gateworks/venice/spl.c
b/board/gateworks/venice/spl.c
index b56e1b607d58..59a6a29f70d8 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -87,25 +87,14 @@ static void spl_dram_init(int size) ddr_init(dram_timing); }
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE |
PAD_CTL_PE)
#ifdef CONFIG_IMX8MM -static iomux_v3_cfg_t const uart_pads[] = {
IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),-};
What about the clock? I'm a bit surprised that it works without the clock enabled.
Michael,
The clock hasn't changed. Like Peng's series for converting imx8mm-evk, imx8mn-evk, and imx8mp-evk to DM_SERIAL, the board_init_f() function still calls 'init_uart_clk(1)' for UART2 (index is 0-based UART) and that is still required. I'm not sure why the dm IMX driver can't do that but it doesn't currently and that could always be an imx8mm general cleanup later.
Are your questions because you are trying to implement DM_SERIAL for one of your boards and having issues? If so, please submit your patch as an RFC so we can try to help.
Was just a question on your changes. I already have my patch and I will post. Clk for me is not removed.
Michael
Best Regards,
Tim
Michael
static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B |
MUX_PAD_CTRL(WDOG_PAD_CTRL),
}; #endif #ifdef CONFIG_IMX8MN -static const iomux_v3_cfg_t uart_pads[] = {
IMX8MN_PAD_UART2_RXD__UART2_DCE_RX |MUX_PAD_CTRL(UART_PAD_CTRL),
IMX8MN_PAD_UART2_TXD__UART2_DCE_TX |MUX_PAD_CTRL(UART_PAD_CTRL),
-};
static const iomux_v3_cfg_t wdog_pads[] = { IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B |
MUX_PAD_CTRL(WDOG_PAD_CTRL),
}; @@ -119,8 +108,6 @@ int board_early_init_f(void)
set_wdog_reset(wdog);
imx_iomux_v3_setup_multiple_pads(uart_pads,ARRAY_SIZE(uart_pads));
return 0;}
@@ -232,8 +219,6 @@ void board_init_f(ulong dummy)
timer_init();
preloader_console_init();/* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start);@@ -243,6 +228,8 @@ void board_init_f(ulong dummy) hang(); }
preloader_console_init();ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@30380000", &dev);diff --git a/configs/imx8mm_venice_defconfig
b/configs/imx8mm_venice_defconfig
index dd61ec9b70fb..1ccbe9970a6c 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -110,6 +110,7 @@ CONFIG_SPL_DM_PMIC_MP5416=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/imx8mn_venice_defconfig
b/configs/imx8mn_venice_defconfig
index c3a96a378553..ff926dac0e18 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -108,6 +108,7 @@ CONFIG_SPL_DM_PMIC_MP5416=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y -- 2.17.1
-- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@amarulasolutions.com __________________________________
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