This patch uses mv_sata_ide and cmd_ide to enable the use of the integrated SATAHC controller port 1.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- board/LaCie/edminiv2/edminiv2.c | 5 ++++ include/configs/edminiv2.h | 47 +++++++++++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 2 deletions(-)
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c index 54c0ffe..6336429 100644 --- a/board/LaCie/edminiv2/edminiv2.c +++ b/board/LaCie/edminiv2/edminiv2.c @@ -88,5 +88,10 @@ int board_init(void) /* boot parameter start at 256th byte of RAM base */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+ /* Enable SATA ports if SATA IDE was configured */ +#if defined(CONFIG_MV_SATA_IDE) + mv_sata_ide_initialize_port(orion5x_port1_sata_registers); +#endif + return 0; } diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c3d95a0..1a61437 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -52,6 +52,12 @@ #define CONFIG_SYS_HZ 1000
/* + * __io is necessary for cmd_ide to compile + */ + +#define __io + +/* * Board-specific values for Orion5x MPP low level init: * - MPPs 12 to 15 are SATA LEDs (mode 5) * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for @@ -60,7 +66,7 @@
#define ORION5X_MPP0_7 0x00000003 #define ORION5X_MPP8_15 0x55550000 -#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_MPP16_23 0x00005555
/* * Board-specific values for Orion5x GPIO low level init: @@ -74,7 +80,6 @@ */
#define ORION5X_GPIO_OUT_ENABLE 0x03fcffff -#define ORION5X_GPIO_OUT_VALUE 0x03fcffff
/* * NS16550 Configuration @@ -131,6 +136,7 @@ * Commands configuration - using default command set for now */ #include <config_cmd_default.h> + /* * Disabling some default commands for staggered bring-up */ @@ -138,6 +144,43 @@ #undef CONFIG_CMD_NET /* no net since no eth */ #undef CONFIG_CMD_NFS /* no NFS since no net */
+#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 + +/* + * ED Mini V2 has an IDE-compatible SATA connector for port 1 + */ + +#define CONFIG_MV_SATA_IDE +#define CONFIG_MV_SATA_IDE_USE_PORT1 + +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO + +/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) + +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 + +/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48 + +/* + * CONFIG_CMD_IDE requires some #defines for ATA registers + */ + +/* A single bus, a single device */ +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE +/* ATA bus 0 is orion5x port 1 on ED Mini V2 */ +#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET + /* * Environment variables configurations */