The readl_poll_timeout() function is currently polling for the indirect operation completion bit with a 10ms timeout, which triggers an "Indirect write timed out" error. The indirect done status is also using a 10ms timeout, leading to "Indirect write clear completion" errors. To resolve these timeouts, the timeout value has been increased to 500ms, taking reference from the Linux implementation.
Signed-off-by: Prasad Kummari prasad.kummari@amd.com --- drivers/spi/cadence_qspi_apb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 3c71a5effc..c6bade60a0 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -889,7 +889,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv,
/* Wait up to Indirect Operation Complete bit to set */ ret = readl_poll_timeout(priv->regbase + CQSPI_REG_IRQSTATUS, cr, - cr & CQSPI_REG_IRQ_IND_COMP, 10); + cr & CQSPI_REG_IRQ_IND_COMP, 500);
if (ret) { printf("Indirect write timed out (%i)\n", ret); @@ -902,7 +902,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv,
/* Check indirect done status */ ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTWR, - CQSPI_REG_INDIRECTWR_DONE, 1, 10, 0); + CQSPI_REG_INDIRECTWR_DONE, 1, 500, 0); if (ret) { printf("Indirect write completion error (%i)\n", ret); goto failwr; @@ -917,7 +917,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv,
/* Check indirect done status */ ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTWR, - CQSPI_REG_INDIRECTWR_DONE, 0, 10, 0); + CQSPI_REG_INDIRECTWR_DONE, 0, 500, 0); if (ret) { printf("Indirect write clear completion error (%i)\n", ret); goto failwr;