
4 Oct
2019
4 Oct
'19
3:05 p.m.
Enable clock driver for Versal.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 75f8b983080d..f924d3e54221 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -45,6 +45,7 @@ CONFIG_OF_BOARD=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_CLK_VERSAL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y
--
2.17.1