Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module based on Rockchip RK3588J from Edgeble AI.
General features: - Rockchip RK3588J - up to 32GB LPDDR4x - up to 128GB eMMC - 2x MIPI CSI2 FPC - On module WiFi6/BT
Neural Compute Module 6B(Neu6B) IO board is an industrial form factor ready-to-use IO board from Edgeble AI.
General features: - microSD slot - 1x HDMI Out - 1x HDMI In - 2x DP - 1x eDP - 2x MIPI DSI connector - 4x MIPI CSI2 connector - 2x USB Host - 2x USB 3.0 OTG/Host - 1x SATA - 1x 2.5Gbps Ethernet - 1x M.2 B-Key for 4G/5G cards - 1x M.2 M-Key slot - 1x Onboard PoE - 1x RS485, RS232, CAN - 1x Audio, MIC port - RTC battery slot - 40-pin GPIO expansion
Neu6B needs to mount on top of this IO board in order to create a complete Edgeble Neural Compute Module 6B(Neu6B) IO platform.
Kernel commits: commit <5f06c3f508f7> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B SoM") commit <3a9181a43b94> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B IO")
Signed-off-by: Jagan Teki jagan@edgeble.ai --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 27 ++++++++++++++++++++ arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 32 ++++++++++++++++++++++++ 3 files changed, 60 insertions(+) create mode 100644 arch/arm/dts/rk3588-edgeble-neu6b-io.dts create mode 100644 arch/arm/dts/rk3588-edgeble-neu6b.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 480269fa60..145e14eae9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -173,6 +173,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ + rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \ rk3588-rock-5b.dtb
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts new file mode 100644 index 0000000000..e9d5a8bab5 --- /dev/null +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + */ + +/dts-v1/; +#include "rk3588j.dtsi" +#include "rk3588-edgeble-neu6b.dtsi" + +/ { + model = "Edgeble Neu6B IO Board"; + compatible = "edgeble,neural-compute-module-6b-io", + "edgeble,neural-compute-module-6b", "rockchip,rk3588"; + + aliases { + serial2 = &uart2; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi new file mode 100644 index 0000000000..1c5bcf1280 --- /dev/null +++ b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + */ + +/ { + compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + }; + + vcc12v_dcin: vcc12v-dcin-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status = "okay"; +};