On 10/14/2016 01:01 PM, York Sun wrote:
Previously it was believed L3 cache has to be flushed in order to guarantee data integrity in main memory. However, flushing L3 cache may require EL3, depending on SoC implementation. Flushing with virtual address can also put data into main memory. The trick is to find the correct address range. For U-Boot to function correctly, the stack needs to be flushed, up to the top of ram used by U-Boot.
Signed-off-by: York Sun york.sun@nxp.com
Pardon me for this mess up. I thought I put the following addresses in Series-cc. But evidentially I did it wrong.
York
Thierry Reding treding@nvidia.com, Radha Mohan Chintakuntla rchintakuntla@cavium.com, Alison Wang b18965@freescale.com, Albert Aribaud albert.u.boot@aribaud.net, Sergey Temerkhanov s.temerkhanov@gmail.com, Stephen Warren swarren@nvidia.com