Simple PLL clocks like PLLD2 were omitted since they do not share common 4 register structure with main clocks. Such clocks are contained in simple PLL group. Only clock_start_pll function supported them. This patch expands this support on clock_set_rate and clock_get_rate which should make simple PLL clocks equal to main PLL clocks.
Implementation was tested on T30/T114 using PLLD2 simple PLL (PLLD2 can serve as a video subsystem main clock and this is how it was tested).
Patches pass buildman ./tools/buildman/buildman tegra
Building current source for 33 boards (12 threads, 1 job per thread) 33 0 0 /33 colibri_t30 Completed: 33 total built, 33 newly), duration 0:06:25, rate 0.09
Svyatoslav Ryhel (3): ARM: tegra: clock: support get and set rate for simple PLL ARM: tegra30: clock: implement PLLD2 support ARM: tegra114: clock: implement PLLD2 support
arch/arm/include/asm/arch-tegra/clk_rst.h | 3 +- .../include/asm/arch-tegra114/clock-tables.h | 2 +- .../include/asm/arch-tegra30/clock-tables.h | 2 +- arch/arm/mach-tegra/clock.c | 78 ++++++++++++++----- arch/arm/mach-tegra/tegra114/clock.c | 22 ++++++ arch/arm/mach-tegra/tegra124/clock.c | 12 ++- arch/arm/mach-tegra/tegra20/clock.c | 15 ++++ arch/arm/mach-tegra/tegra210/clock.c | 15 ++++ arch/arm/mach-tegra/tegra30/clock.c | 22 ++++++ 9 files changed, 146 insertions(+), 25 deletions(-)