From: Stephen Warren swarren@nvidia.com
An SMC call is required for all cache-wide operations on Tegra186. This patch implements the two missing hooks now that U-Boot supports them, and fixes the mapping of "hook name" to SMC call code.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/mach-tegra/tegra186/cache.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra186/cache.c b/arch/arm/mach-tegra/tegra186/cache.c index fb0b1142e49b..3ab60b3b85b2 100644 --- a/arch/arm/mach-tegra/tegra186/cache.c +++ b/arch/arm/mach-tegra/tegra186/cache.c @@ -8,16 +8,33 @@ #include <asm/system.h>
#define SMC_SIP_INVOKE_MCE 0x82FFFF00 -#define MCE_SMC_ROC_FLUSH_CACHE 11 +#define MCE_SMC_ROC_FLUSH_CACHE 11 +#define MCE_SMC_ROC_FLUSH_CACHE_ONLY 14 +#define MCE_SMC_ROC_CLEAN_CACHE_ONLY 15
-int flush_dcache_all_l3(void) +static int smc_sip_invoke_mce(int cmd) { struct pt_regs regs = {0};
isb();
- regs.regs[0] = SMC_SIP_INVOKE_MCE | MCE_SMC_ROC_FLUSH_CACHE; + regs.regs[0] = SMC_SIP_INVOKE_MCE | cmd; smc_call(®s);
return 0; } + +int invalidate_dcache_all_l3(void) +{ + return smc_sip_invoke_mce(MCE_SMC_ROC_FLUSH_CACHE_ONLY); +} + +int flush_dcache_all_l3(void) +{ + return smc_sip_invoke_mce(MCE_SMC_ROC_CLEAN_CACHE_ONLY); +} + +int invalidate_icache_all_l3(void) +{ + return smc_sip_invoke_mce(MCE_SMC_ROC_FLUSH_CACHE); +}