On 01/24/2014 08:20 AM, Thierry Reding wrote:
On Thu, Jan 23, 2014 at 05:42:54PM -0700, Stephen Warren wrote: [...]
diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h
[...]
@@ -105,10 +128,10 @@ struct clk_rst_ctlr { uint crc_clk_cpug_cmplx; /* _CLK_CPUG_CMPLX_0, 0x378 */ uint crc_clk_cpulp_cmplx; /* _CLK_CPULP_CMPLX_0, 0x37C */ uint crc_cpu_softrst_ctrl; /* _CPU_SOFTRST_CTRL_0, 0x380 */
- uint crc_cpu_softrst_ctrl1; /* _CPU_SOFTRST_CTR1L_0, 0x384 */
- uint crc_cpu_softrst_ctrl1; /* _CPU_SOFTRST_CTRL1_0, 0x384 */ uint crc_cpu_softrst_ctrl2; /* _CPU_SOFTRST_CTRL2_0, 0x388 */ uint crc_reserved33[9]; /* _reserved_33, 0x38c-3ac */
- uint crc_clk_src_vw[TEGRA_CLK_SOURCES_VW]; /* _G3D2_0..., 0x3b0-0x42c */
- uint crc_clk_src_vw[TEGRA_CLK_SOURCES_VW]; /* 0x3B0-0x42C */
While at it, perhaps also make the offsets in the comment for crc_reserved33 also all caps?
I think I won't change this; it's a pre-existing issue, and "fixing" it would involve adding a bunch of unrelated diffs to this patch. Besides, the actual register entries are upper case to match the way the TRM documents the register names, whereas IIRC the reserved spaces aren't documented specifically in the TRM, and don't have to match :-)
+/* CLK_RST_CONTROLLER_RST_CPUxx_CMPLX_CLR 0x344 */ +#define CLR_CPURESET0 (1 << 0) +#define CLR_CPURESET1 (1 << 1) +#define CLR_CPURESET2 (1 << 2) +#define CLR_CPURESET3 (1 << 3)
[...]
+/* CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR 0x34c */ +#define CLR_CPU3_CLK_STP (1 << 11) +#define CLR_CPU2_CLK_STP (1 << 10) +#define CLR_CPU1_CLK_STP (1 << 9) +#define CLR_CPU0_CLK_STP (1 << 8)
Sometimes these are listed in order of increasing bit positions, other times they are in order of decreasing bit positions.
Hmmm. The existing files seem to be inconsistent too. I think LSB->MSB is slightly more prevalent, so I'll try and settle on that, at least for the lines this patch adds.