From datasheet, when READY bit is set inside PM_CTRL register, it means that
device is already in *normal* (D0) mode => it doesn't need to be wake-up.
With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE bits of PM_CTRL register is in D1/D2 mode.
Signed-off-by: Bertrand Cachet bertrand.cachet@heig-vd.ch --- drivers/net/smc911x.h | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 8ce08a9..61f7669 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h @@ -471,8 +471,12 @@ static void smc911x_reset(struct eth_device *dev) { int timeout;
- /* Take out of PM setting first */ - if (smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) { + /* Take out of PM setting first */ + /* + * If PMT_CTRL_READY bit is set to 1b => power management is + * already ready + */ + if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) { /* Write to the bytetest will take out of powerdown */ smc911x_reg_write(dev, BYTE_TEST, 0x0);