15 Jul
2022
15 Jul
'22
11:16 a.m.
On Fri, Jul 15, 2022 at 9:39 AM Samuel Holland samuel@sholland.org wrote:
From: Andre Przywara andre.przywara@arm.com
As Icenowy pointed out, newer manuals (starting with H6) actually document the register block at offset 0x800 as "HCI controller and PHY interface", also describe the bits in our "PMU_UNK1" register. Let's put proper names to those "unknown" variables and symbols.
While we are at it, generalise the existing code by allowing a bitmap of bits to clear and set, to cover newer SoCs: The A100 and H616 use a different bit for the SIDDQ control.
Signed-off-by: Andre Przywara andre.przywara@arm.com Signed-off-by: Samuel Holland samuel@sholland.org
Reviewed-by: Jagan Teki jagan@amarulasolutions.com