Allen,
On Wed, Jan 16, 2013 at 3:39 PM, Allen Martin amartin@nvidia.com wrote:
On Wed, Jan 16, 2013 at 01:14:02PM -0800, Tom Warren wrote:
Common Tegra files are in arch-tegra, shared between T20/T30/T114. Tegra114-specific headers are in arch-tegra114. Note that some of these will be filled in as more T114 support is added (drivers, WB/LP0 support, etc.).
Signed-off-by: Tom Warren twarren@nvidia.com
+#if defined(CONFIG_TEGRA20) #define OSC_FREQ_SHIFT 30 #define OSC_FREQ_MASK (3U << OSC_FREQ_SHIFT) +#else /* Tegra30, Tegra114 */ +#define OSC_FREQ_SHIFT 28 +#define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) +#endif
Can this be a new define instead of a #ifdef? That makes it easier in the future to make a single u-boot to boot on all tegras.
I could move it to a SoC-specific header (arch-tegraXX/clock.h, for instance). Would that do?
index 953936c..670745f 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -73,6 +73,7 @@ enum { SKU_ID_AP25E = 0x1b, SKU_ID_T25E = 0x1c, SKU_ID_T30 = 0x81, /* Cardhu value */
SKU_ID_T114 = 0x00, /* Dalmore value */};
Is that really the proper SKU id? Or is it just unprogrammed on the early chips?
AFAIK, it's unprogrammed - it's what I get when I read the sku_id reg on my board. I haven't found any documentation about what these'll be in the future or for other boards. This works for now - could you verify that your Dalmore has the same ID?
diff --git a/arch/arm/include/asm/arch-tegra114/clock.h b/arch/arm/include/asm/arch-tegra114/clock.h new file mode 100644 index 0000000..9e56f57 --- /dev/null +++ b/arch/arm/include/asm/arch-tegra114/clock.h @@ -0,0 +1,24 @@ +/*
- Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
2013, here and all new files
Yeah, crap. Meant to do that before sending. I'll correct 'em all in V2 of the patchset.
Thanks!
-Allen
nvpublic