Hi Tom,
please pull these fixes to your tree. There is one rename patch I am considering more as a fix and will be used much more in next version when I am going to remove xilinx zynq board defconfig and use generic configuration instead.
Gitlab and travis look good. https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/pipelines/2311 https://travis-ci.org/michalsimek/u-boot/builds/656213108
Thanks, Michal
The following changes since commit 12fdbbe860f395575f360f0c03d84bce61a9a212:
Merge tag 'ti-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2020-02-27 08:51:01 -0500)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2020.04-rc4
for you to fetch changes up to 25974079750c5fbf920a226a26d8cb9b1aff2544:
ARM: zynq: Remove single comment about QSPI (2020-02-28 12:19:40 +0100)
---------------------------------------------------------------- Xilinx fixes for v2020.04-rc4
- Fix link good bit handling in dp83867 - Rename generic Zynq defconfig - Fix zybo z7 low leve setup - Fix error path in zynq_gem driver and fix 64bit usage - Fix invalid clock name quieries for Versal - Fix zynq/zynqmp SPL low level configuration via DT selection
---------------------------------------------------------------- Michal Simek (5): net: phy: dp83867: Clean force link good bit net: zynq: Free allocated buffers in case of error arm: xilinx: Fill DEVICE_TREE directly in Makefiles ARM: zynq: Rename defconfig to be align with ZynqMP and Versal ARM: zynq: Remove single comment about QSPI
Milan Obuch (2): arm: zynq: zybo z7: fix MIO init issue arm: zynq: zybo z7: fix SPL uart init bitrate
Rajan Vaja (1): versal: drivers: clk: Fix invalid clock name queries
T Karthik Reddy (2): net: zynq_gem: Use ulong instead of u32 data type mtd: nand: Fix on-die ecc issues in arasan_nfc driver
board/xilinx/zynq/MAINTAINERS | 1 + board/xilinx/zynq/Makefile | 5 +++++ board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 4 ++-- board/xilinx/zynqmp/Makefile | 5 +++++ configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} | 0 configs/zynq_zybo_z7_defconfig | 2 +- drivers/clk/clk_versal.c | 6 ++++++ drivers/mtd/nand/raw/arasan_nfc.c | 11 ++++++++--- drivers/net/phy/dp83867.c | 4 ++++ drivers/net/zynq_gem.c | 24 ++++++++++++++++++------ include/configs/zynq-common.h | 2 -- 11 files changed, 50 insertions(+), 14 deletions(-) rename configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} (100%)