From: Aymen Sghaier aymen.sghaier@nxp.com
The TRNG as used in RNG4, used in CAAM has a documentation issue. The effect is that it is possible that the entropy used to instantiate the DRBG may be old entropy, rather than newly generated entropy. There is proper programming guidance, but it is not in the documentation.
Signed-off-by: Aymen Sghaier aymen.sghaier@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- drivers/crypto/fsl_caam.c | 11 ++++++++--- drivers/crypto/fsl_caam_internal.h | 1 + 2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/fsl_caam.c b/drivers/crypto/fsl_caam.c index ccdf131635..092635123d 100644 --- a/drivers/crypto/fsl_caam.c +++ b/drivers/crypto/fsl_caam.c @@ -315,7 +315,12 @@ static void kick_trng(u32 ent_delay) u32 val;
/* Put RNG in program mode */ - setbits_le32(CAAM_RTMCTL, RTMCTL_PGM); + /* Setting both RTMCTL:PRGM and RTMCTL:TRNG_ACC causes TRNG to + * properly invalidate the entropy in the entropy register and + * force re-generation. + */ + setbits_le32(CAAM_RTMCTL, RTMCTL_PGM | RTMCTL_ACC); + /* Configure the RNG Entropy Delay * Performance-wise, it does not make sense to * set the delay to a value that is lower @@ -329,7 +334,7 @@ static void kick_trng(u32 ent_delay) val >>= BS_TRNG_ENT_DLY; if (ent_delay < val) { /* Put RNG4 into run mode */ - clrbits_le32(CAAM_RTMCTL, RTMCTL_PGM); + clrbits_le32(CAAM_RTMCTL, RTMCTL_PGM | RTMCTL_ACC); return; }
@@ -361,7 +366,7 @@ static void kick_trng(u32 ent_delay) val &= ~BM_TRNG_SAMP_MODE; val |= TRNG_SAMP_MODE_RAW_ES_SC; /* Put RNG4 into run mode */ - val &= ~RTMCTL_PGM; + val &= ~(RTMCTL_PGM | RTMCTL_ACC); /*test with sample mode only */ __raw_writel(val, CAAM_RTMCTL);
diff --git a/drivers/crypto/fsl_caam_internal.h b/drivers/crypto/fsl_caam_internal.h index 837562d3c4..553bb4cd10 100644 --- a/drivers/crypto/fsl_caam_internal.h +++ b/drivers/crypto/fsl_caam_internal.h @@ -122,6 +122,7 @@ #define RTMCTL_PGM BIT(16) #define RTMCTL_ERR BIT(12) #define RTMCTL_RST BIT(6) +#define RTMCTL_ACC BIT(5) #define RDSTA_IF0 (1) #define RDSTA_IF1 (2) #define RDSTA_SKVN BIT(30)