13 Dec
2004
13 Dec
'04
9:34 a.m.
Hi there,
since enabling the "main oscillator" of Atmel's AT91RM9200 is very board specific and must not be done on some boards (which use external clock oscilators instead of crystals) I suggest
* Patch by Steven Scholz, 13 Dec 2004: Move code for AT91 "main oscillator" into board specific memsetup.S files
--
Steven Scholz
Index: u-boot/cpu/at91rm9200/start.S
===================================================================
RCS file: /cvsroot/u-boot/u-boot/cpu/at91rm9200/start.S,v
retrieving revision 1.7
diff -u -r1.7 start.S
--- u-boot/cpu/at91rm9200/start.S 21 Nov 2004 00:06:35 -0000 1.7
+++ u-boot/cpu/at91rm9200/start.S 13 Dec 2004 08:20:32 -0000
@@ -116,22 +116,6 @@
msr cpsr,r0
#ifdef CONFIG_BOOTBINFUNC
-/* code based on entry.S from ATMEL */
-#define AT91C_BASE_CKGR 0xFFFFFC20
-#define CKGR_MOR 0
- /* Get the CKGR Base Address */
- ldr r1, =AT91C_BASE_CKGR
-
-/* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
-/* ldr r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
- ldr r0, =0x0000FF01
- str r0, [r1, #CKGR_MOR]
- /* Add loop to compensate Main Oscillator startup time */
- ldr r0, =0x00000010
-LoopOsc:
- subs r0, r0, #1
- bhi LoopOsc
-
/* scratch stack */
ldr r1, =0x00204000
/* Insure word alignment */
Index: u-boot/board/at91rm9200dk/memsetup.S
===================================================================
RCS file: /cvsroot/u-boot/u-boot/board/at91rm9200dk/memsetup.S,v
retrieving revision 1.2
diff -u -r1.2 memsetup.S
--- u-boot/board/at91rm9200dk/memsetup.S 13 Dec 2004 00:18:45 -0000 1.2
+++ u-boot/board/at91rm9200dk/memsetup.S 13 Dec 2004 08:20:33 -0000
@@ -85,12 +85,25 @@
#define SDRC_TR 0xFFFFFF94
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define CKGR_MOR 0
_TEXT_BASE:
.word TEXT_BASE
.globl lowlevelinit
lowlevelinit:
+ /* Get the CKGR Base Address */
+ ldr r1, =AT91C_BASE_CKGR
+ /* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
+ ldr r0, =0x0000FF01
+ str r0, [r1, #CKGR_MOR]
+ /* Add loop to compensate Main Oscillator startup time */
+ ldr r0, =0x00000010
+LoopOsc:
+ subs r0, r0, #1
+ bhi LoopOsc
+
/* memory control configuration */
/* this isn't very elegant, but what the heck */
ldr r0, =SMRDATA
Index: u-boot/board/cmc_pu2/memsetup.S
===================================================================
RCS file: /cvsroot/u-boot/u-boot/board/cmc_pu2/memsetup.S,v
retrieving revision 1.5
diff -u -r1.5 memsetup.S
--- u-boot/board/cmc_pu2/memsetup.S 13 Dec 2004 00:18:45 -0000 1.5
+++ u-boot/board/cmc_pu2/memsetup.S 13 Dec 2004 08:20:33 -0000
@@ -85,6 +85,8 @@
#define SDRC_TR 0xFFFFFF94
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define CKGR_MOR 0
_MTEXT_BASE:
#undef START_FROM_MEM
@@ -96,6 +98,17 @@
.globl lowlevelinit
lowlevelinit:
+ /* Get the CKGR Base Address */
+ ldr r1, =AT91C_BASE_CKGR
+ /* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
+ ldr r0, =0x0000FF01
+ str r0, [r1, #CKGR_MOR]
+ /* Add loop to compensate Main Oscillator startup time */
+ ldr r0, =0x00000010
+LoopOsc:
+ subs r0, r0, #1
+ bhi LoopOsc
+
/* memory control configuration */
/* this isn't very elegant, but what the heck */
ldr r0, =SMRDATA