This series of patches base on the latest branch/master,and adds ethernet support for the StarFive JH7110 RISC-V SoC. The series includes EEPROM, PHY and MAC drivers. The PHY model is YT8531 (from Motorcomm Inc), and the MAC version is dwmac-5.20 (from Synopsys DesignWare).
The implementation of the phy driver is ported from linux, but it has been adjusted for the u-boot framework.
EEPROM stores board-related information, such as DDR capacity, PCB version, MAC address, etc.
The main difference between StarFive VisionFive 2 1.2A and 1.3B is gmac, but the difference in gmac is not defined in DT, but reads the PCB version from EEPROM, and then dynamically configures the difference of gmac according to different PCB versions, which is compatible with 1.2A and 1.3B versions, which is more user-friendly.
The PHY and MAC driver has been tested on the StarFive VisionFive 2 1.2A and 1.3B boards and works normally.
For more information and support,you can visit RVspace wiki[1]. [1] https://wiki.rvspace.org/
v4: - Reworded the definition of the 'pbuf' variable in visionfive2-i2c-eeprom.c from a const pointer to const union. - Added the section (".data") attribute to the 'pbuf' and 'has_been_read' global variables in visionfive2-i2-eeprom.c.
v3: - Added EEPROM support. - Combine the board device tree of 1.2A and 1.3B into one. - Removed the delay configuration of gmac phy clock from DT. - Dynamically configure gmac differences of 1.2A and 1.3B to DT according to the PCB version. - DDR capacity information is read from EEPROM first, if not, it is defined by default in DT.
v2: - Reworded the phy driver. Added platform private data struct to save the configuration data read from dts. - Reworded the MAC driver. Added platform private data struct to save the configuration data read from dts.
Previous versions: v1 - https://patchwork.ozlabs.org/project/uboot/cover/20230317010536.17860-1-yanh... v2 - https://patchwork.ozlabs.org/project/uboot/cover/20230329102720.25439-1-yanh... v3 - https://patchwork.ozlabs.org/project/uboot/cover/20230428022515.29393-1-yanh...
Yanhong Wang (11): net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy net: dwc_eth_qos: Add StarFive ethernet driver glue layer eeprom: starfive: Enable ID EEPROM configuration ram: starfive: Read memory size information from EEPROM board: starfive: Dynamic configuration of DT for 1.2A and 1.3B riscv: dts: jh7110: Add ethernet device tree nodes riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B riscv: dts: starfive: Add support eeprom device tree node doc: board: starfive:　Reword the make defconfig information configs: starfive: Enable ethernet configuration for StarFive VisionFive2 configs: starfive: Enable ID EEPROM configuration
arch/riscv/cpu/jh7110/spl.c | 32 +- arch/riscv/dts/Makefile | 3 +- ... jh7110-starfive-visionfive-2-u-boot.dtsi} | 39 +- .../jh7110-starfive-visionfive-2-v1.2a.dts | 12 - ...10-starfive-visionfive-2-v1.3b-u-boot.dtsi | 69 --- ...b.dts => jh7110-starfive-visionfive-2.dts} | 3 +- .../dts/jh7110-starfive-visionfive-2.dtsi | 40 ++ arch/riscv/dts/jh7110.dtsi | 69 +++ arch/riscv/include/asm/arch-jh7110/eeprom.h | 13 + board/starfive/visionfive2/Makefile | 1 + board/starfive/visionfive2/spl.c | 157 +++++ .../visionfive2/starfive_visionfive2.c | 13 + .../visionfive2/visionfive2-i2c-eeprom.c | 561 ++++++++++++++++++ configs/starfive_visionfive2_defconfig | 32 +- doc/board/starfive/visionfive2.rst | 6 +- drivers/net/Kconfig | 7 + drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 6 + drivers/net/dwc_eth_qos.h | 1 + drivers/net/dwc_eth_qos_starfive.c | 249 ++++++++ drivers/net/phy/Kconfig | 6 + drivers/net/phy/Makefile | 1 + drivers/net/phy/motorcomm.c | 437 ++++++++++++++ drivers/ram/starfive/starfive_ddr.c | 2 - 24 files changed, 1665 insertions(+), 95 deletions(-) rename arch/riscv/dts/{jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi => jh7110-starfive-visionfive-2-u-boot.dtsi} (58%) delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts delete mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi rename arch/riscv/dts/{jh7110-starfive-visionfive-2-v1.3b.dts => jh7110-starfive-visionfive-2.dts} (65%) create mode 100644 arch/riscv/include/asm/arch-jh7110/eeprom.h create mode 100644 board/starfive/visionfive2/visionfive2-i2c-eeprom.c create mode 100644 drivers/net/dwc_eth_qos_starfive.c create mode 100644 drivers/net/phy/motorcomm.c
base-commit: 62df7a39442902a71259568c13a4d496d5a514f4