Re: [U-Boot] [PATCH] OMAP3: Print correct silicon revision

22 Apr 2009

Premi, Sanjeev wrote:
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-----Original Message-----
From: Dirk Behme [mailto:dirk.behme@googlemail.com] 
Sent: Wednesday, April 22, 2009 1:04 AM
To: Premi, Sanjeev
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] OMAP3: Print correct silicon revision
Dear Premi,
Premi, Sanjeev wrote:
...
...
-----Original Message-----
From: Premi, Sanjeev 
Sent: Tuesday, April 21, 2009 11:37 PM
To: 'Dirk Behme'
Cc: u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH] OMAP3: Print correct silicon revision
...
-----Original Message-----
From: Dirk Behme [mailto:dirk.behme@googlemail.com] 
Sent: Tuesday, April 21, 2009 10:26 PM
To: Premi, Sanjeev
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] OMAP3: Print correct
silicon revision
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...
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Dear Premi,
Sanjeev Premi wrote:
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The function display_board_info() displays the silicon
revision as 2 - based on the return value from get_cpu_rev().
This is incorrect as the current Si version is 3.1
Thanks for the patch and fixing this!
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This patch displays the correct version; but does not
change get_cpu_rev() to minimize the code impact.
I wonder if it wouldn't be better (and cleaner) to fix
get_cpu_rev()?
Yes. This is what I started with; but then this is where I
felt that
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fix may run 'deeper"
u32 get_board_type(void)
{
   if (get_cpu_rev() == CPU_3430_ES2)
   	return sysinfo.board_type_v2;
   else
   	return sysinfo.board_type_v1;
}
...sorry, mail 'went' before I wanted to!
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I couldn't figure out how this impacts boards other than the EVM.
Though I admit not having much time looking for the impact. Beyond
this, I believe the fix could be straight forward.
What's about something like in the attachment? Compile tested 
only. Do 
you like to test it?
Yes, this works on the EVM.
Great, thanks for testing!
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I did spend some more time & fouund that value from get_board_type is
ignored in the display_board_info().
Hmm, yes, good catch.
...
I will submit a patch to remove this function if it is really not needed.
Ok.
Best regards
Dirk
Btw.: Updated patch in attachment, maybe it helps you. Tested on Beagle.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
---
 board/omap3/beagle/beagle.h            |    2 -
 board/omap3/evm/evm.h                  |    2 -
 board/omap3/overo/overo.h              |    2 -
 board/omap3/pandora/pandora.h          |    2 -
 board/omap3/zoom1/zoom1.h              |    2 -
 cpu/arm_cortexa8/cpu.c                 |    4 +-
 cpu/arm_cortexa8/omap3/board.c         |    5 ---
 cpu/arm_cortexa8/omap3/clock.c         |    5 ++-
 cpu/arm_cortexa8/omap3/sys_info.c      |   48 +++++++++++++++------------------
 include/asm-arm/arch-omap3/omap3.h     |   18 +++++-------
 include/asm-arm/arch-omap3/sys_proto.h |    5 ---
 11 files changed, 38 insertions(+), 57 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/cpu.c
===================================================================

--- u-boot-main.orig/cpu/arm_cortexa8/cpu.c
+++ u-boot-main/cpu/arm_cortexa8/cpu.c
@@ -101,7 +101,7 @@ void l2cache_enable()
    volatile unsigned int j;
/* ES2 onwards we can disable/enable L2 ourselves */
-	if (get_cpu_rev() == CPU_3430_ES2) {
+	if (get_cpu_rev() >= CPU_3XX_ES20) {
    	__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
    	__asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
    	__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
@@ -131,7 +131,7 @@ void l2cache_disable()
    volatile unsigned int j;
/* ES2 onwards we can disable/enable L2 ourselves */
-	if (get_cpu_rev() == CPU_3430_ES2) {
+	if (get_cpu_rev() >= CPU_3XX_ES20) {
    	__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
    	__asm__ __volatile__("bic %0, %0, #0x2":"=r"(i));
    	__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c
+++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c
@@ -132,7 +132,7 @@ void prcm_init(void)
    void (*f_lock_pll) (u32, u32, u32, u32);
    int xip_safe, p0, p1, p2, p3;
    u32 osc_clk = 0, sys_clkin_sel;
-	u32 clk_index, sil_index;
+	u32 clk_index, sil_index = 0;
    prm_t *prm_base = (prm_t *)PRM_BASE;
    prcm_t *prcm_base = (prcm_t *)PRCM_BASE;
    dpll_param *dpll_param_p;
@@ -170,7 +170,8 @@ void prcm_init(void)
     * and sil_index will get the values for that SysClk for the
     * appropriate silicon rev.
     */
-	sil_index = get_cpu_rev() - 1;
+	if(get_cpu_rev())
+		sil_index = 1;
/* Unlock MPU DPLL (slows things down, and needed later) */
    sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
Index: u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/sys_info.c
+++ u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
@@ -35,6 +35,11 @@ extern omap3_sysinfo sysinfo;
 static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
 static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
 static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+static char *rev_s[CPU_3XX_MAX_REV] = {"1.0",
+				       "2.0",
+				       "2.1",
+				       "3.0",
+				       "3.1"};
/*****************************************************************
  * dieid_num_r(void) - read and set die ID
@@ -76,17 +81,27 @@ u32 get_cpu_type(void)
 u32 get_cpu_rev(void)
 {
    u32 cpuid = 0;
+	ctrl_id_t *id_base;
/*
     * On ES1.0 the IDCODE register is not exposed on L4
-	 * so using CPU ID to differentiate
-	 * between ES2.0 and ES1.0.
+	 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
     */
    __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
    if ((cpuid & 0xf) == 0x0)
-		return CPU_3430_ES1;
-	else
-		return CPU_3430_ES2;
+		return CPU_3XX_ES10;
+	else {
+		/* Decode the IDs on > ES1.0 */
+		id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE;
+
+		cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xF;
+
+		/* Some early ES2.0 seem to report ID 0, fix this */
+		if(cpuid == 0)
+			cpuid = CPU_3XX_ES20;
+
+		return cpuid;
+	}
}
@@ -130,23 +145,6 @@ u32 get_sdr_cs_offset(u32 cs)
    return offset;
 }
-/***********************************************************************
- * get_board_type() - get board type based on current production stats.
- *  - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
- *    when they are available we can get info from there.  This should
- *    be correct of all known boards up until today.
- *  - NOTE-2- EEPROMs are populated but they are updated very slowly.  To
- *    avoid waiting on them we will use ES version of the chip to get info.
- *    A later version of the FPGA migth solve their speed issue.
- ************************************************************************/
-u32 get_board_type(void)
-{
-	if (get_cpu_rev() == CPU_3430_ES2)
-		return sysinfo.board_type_v2;
-	else
-		return sysinfo.board_type_v1;
-}
-
 /***************************************************************************
  *  get_gpmc0_base() - Return current address hardware will be
  *     fetching from. The below effectively gives what is correct, its a bit
@@ -188,7 +186,7 @@ u32 get_board_rev(void)
 /*********************************************************************
  *  display_board_info() - print banner with board info.
  *********************************************************************/
-void display_board_info(u32 btype)
+void display_board_info(void)
 {
    char *cpu_s, *mem_s, *sec_s;
@@ -233,8 +231,8 @@ void display_board_info(u32 btype)
    }
-	printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s,
-	       sec_s, get_cpu_rev());
+	printf("OMAP%s-%s rev ES%s, CPU-OPP2 L3-165MHz\n", cpu_s,
+	       sec_s, rev_s[get_cpu_rev()]);
    printf("%s + %s/%s\n", sysinfo.board_string,
           mem_s, sysinfo.nand_string);
Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h
===================================================================
--- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h
+++ u-boot-main/include/asm-arm/arch-omap3/omap3.h
@@ -171,20 +171,18 @@ typedef struct gpio {
  * ES1     = 0+1 = 1
  * ES1     = 1+1 = 1
  */
-#define CPU_3430_ES1		1
-#define CPU_3430_ES2		2
+#define CPU_3XX_ES10		0
+#define CPU_3XX_ES20		1
+#define CPU_3XX_ES21		2
+#define CPU_3XX_ES30		3
+#define CPU_3XX_ES31		4
+#define CPU_3XX_MAX_REV		(CPU_3XX_ES31 + 1)
+
+#define CPU_3XX_ID_SHIFT	28
#define WIDTH_8BIT		0x0000
 #define WIDTH_16BIT		0x1000	/* bit pos for 16 bit in gpmc */
-/* SDP definitions according to FPGA Rev. Is this OK?? */
-#define SDP_3430_V1		0x1
-#define SDP_3430_V2		0x2
-
-/* EVM definitions */
-#define OMAP3EVM_V1		0x1
-#define OMAP3EVM_V2		0x2
-
 /* I2C power management companion definitions */
 #define PWRMGT_ADDR_ID1		0x48
 #define PWRMGT_ADDR_ID2		0x49
Index: u-boot-main/cpu/arm_cortexa8/omap3/board.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/board.c
+++ u-boot-main/cpu/arm_cortexa8/omap3/board.c
@@ -272,11 +272,8 @@ int dram_init(void)
 {
    DECLARE_GLOBAL_DATA_PTR;
    unsigned int size0 = 0, size1 = 0;
-	u32 btype;
-	btype = get_board_type();
-
-	display_board_info(btype);
+	display_board_info();
/*
     * If a second bank of DDR is attached to CS1 this is
Index: u-boot-main/include/asm-arm/arch-omap3/sys_proto.h
===================================================================
--- u-boot-main.orig/include/asm-arm/arch-omap3/sys_proto.h
+++ u-boot-main/include/asm-arm/arch-omap3/sys_proto.h
@@ -22,8 +22,6 @@
 #define _SYS_PROTO_H_
typedef struct {
-	u32 board_type_v1;
-	u32 board_type_v2;
    u32 mtype;
    char *board_string;
    char *nand_string;
@@ -46,8 +44,7 @@ u32 get_sysboot_value(void);
 u32 is_gpmc_muxed(void);
 u32 get_gpmc0_type(void);
 u32 get_gpmc0_width(void);
-u32 get_board_type(void);
-void display_board_info(u32);
+void display_board_info(void);
 u32 get_sdr_cs_size(u32);
 u32 get_sdr_cs_offset(u32);
 u32 is_running_in_sdram(void);
Index: u-boot-main/board/omap3/beagle/beagle.h
===================================================================
--- u-boot-main.orig/board/omap3/beagle/beagle.h
+++ u-boot-main/board/omap3/beagle/beagle.h
@@ -24,8 +24,6 @@
 #define _BEAGLE_H_
const omap3_sysinfo sysinfo = {
-	SDP_3430_V1,
-	SDP_3430_V2,
    DDR_STACKED,
    "OMAP3 Beagle board",
 #if defined(CONFIG_ENV_IS_IN_ONENAND)
Index: u-boot-main/board/omap3/evm/evm.h
===================================================================
--- u-boot-main.orig/board/omap3/evm/evm.h
+++ u-boot-main/board/omap3/evm/evm.h
@@ -24,8 +24,6 @@
 #define _EVM_H_
const omap3_sysinfo sysinfo = {
-	OMAP3EVM_V1,
-	OMAP3EVM_V2,
    DDR_DISCRETE,
    "OMAP3 EVM board",
 #if defined(CONFIG_ENV_IS_IN_ONENAND)
Index: u-boot-main/board/omap3/overo/overo.h
===================================================================
--- u-boot-main.orig/board/omap3/overo/overo.h
+++ u-boot-main/board/omap3/overo/overo.h
@@ -24,8 +24,6 @@
 #define _OVERO_H_
const omap3_sysinfo sysinfo = {
-	SDP_3430_V1,
-	SDP_3430_V2,
    DDR_STACKED,
    "Gumstix Overo board",
 #if defined(CONFIG_ENV_IS_IN_ONENAND)
Index: u-boot-main/board/omap3/pandora/pandora.h
===================================================================
--- u-boot-main.orig/board/omap3/pandora/pandora.h
+++ u-boot-main/board/omap3/pandora/pandora.h
@@ -24,8 +24,6 @@
 #define _PANDORA_H_
const omap3_sysinfo sysinfo = {
-	SDP_3430_V1,
-	SDP_3430_V2,
    DDR_STACKED,
    "OMAP3 Pandora",
    "NAND",
Index: u-boot-main/board/omap3/zoom1/zoom1.h
===================================================================
--- u-boot-main.orig/board/omap3/zoom1/zoom1.h
+++ u-boot-main/board/omap3/zoom1/zoom1.h
@@ -28,8 +28,6 @@
 #define _BOARD_ZOOM1_H_
const omap3_sysinfo sysinfo = {
-	SDP_3430_V1,
-	SDP_3430_V2,
    DDR_STACKED,
    "OMAP3 Zoom MDK Rev 1",
    "NAND",

    