This patch adds support for optional platform specific reset logic in the dwc_eth_qos driver. This new function 'eqos_fix_soc_reset' is called after the EQOS_DMA_MODE_SWR is set and before the driver waits for this bit to clear.
Signed-off-by: Erik Schumacher erik.schumacher@iris-sensing.com --- drivers/net/dwc_eth_qos.c | 3 +++ drivers/net/dwc_eth_qos.h | 1 + 2 files changed, 4 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 3415c418a9..ab51a98e9d 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -712,6 +712,9 @@ static int eqos_start(struct udevice *dev) */ setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR);
+ if (eqos->config->ops->eqos_fix_soc_reset) + eqos->config->ops->eqos_fix_soc_reset(dev); + ret = wait_for_bit_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR, false, eqos->config->swr_wait, false); diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index ce57e22a81..123f98d5d5 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -248,6 +248,7 @@ struct eqos_ops { int (*eqos_set_tx_clk_speed)(struct udevice *dev); int (*eqos_get_enetaddr)(struct udevice *dev); ulong (*eqos_get_tick_clk_rate)(struct udevice *dev); + void (*eqos_fix_soc_reset)(struct udevice *dev); };
struct eqos_priv {