On 05/18/2018 04:05 PM, Ley Foon Tan wrote:
Add misc support such as EMAC and cpu info printout for Stratix SoC
Signed-off-by: Chin Liang See chin.liang.see@intel.com Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
arch/arm/mach-socfpga/Makefile | 1 + arch/arm/mach-socfpga/misc_s10.c | 133 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 134 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-socfpga/misc_s10.c
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 61f5778..c74fec2 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -30,6 +30,7 @@ endif
ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 obj-y += clock_manager_s10.o +obj-y += misc_s10.o obj-y += reset_manager_s10.o obj-y += system_manager_s10.o obj-y += wrap_pinmux_config_s10.o diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c new file mode 100644 index 0000000..918baac --- /dev/null +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
- */
+#include <altera.h> +#include <common.h> +#include <errno.h> +#include <fdtdec.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/reset_manager.h> +#include <asm/arch/system_manager.h> +#include <asm/arch/misc.h> +#include <asm/pl310.h> +#include <linux/libfdt.h>
+#include <dt-bindings/reset/altr,rst-mgr-s10.h>
+DECLARE_GLOBAL_DATA_PTR;
+static struct socfpga_system_manager *sysmgr_regs =
- (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+/*
- DesignWare Ethernet initialization
- */
+#ifdef CONFIG_ETH_DESIGNWARE
+static u32 socfpga_phymode_setup(u32 gmac_index, const char *phymode) +{
- u32 modereg;
- if (!phymode)
return -EINVAL;- if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii"))
modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;- else if (!strcmp(phymode, "rgmii"))
modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII;- else if (!strcmp(phymode, "rmii"))
modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;- else
return -EINVAL;- clrsetbits_le32(&sysmgr_regs->emac0 + gmac_index,
SYSMGR_EMACGRP_CTRL_PHYSEL_MASK,modereg);- return 0;
+}
This looks quite similar to what A10 does. Can you rebase this one on top of u-boot-socfpga/master ?