Signed-off-by: Heiko Schocher hs@denx.de Cc: Sandeep Paulraj s-paulraj@ti.com Cc: Tom Rini tom.rini@gmail.com Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Christian Riesch christian.riesch@omicron.at --- board/davinci/common/misc.c | 19 ++++++++++--------- 1 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 5aa7605..5f510b6 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -51,16 +51,16 @@ void dram_init_banksize(void) #endif
#ifdef CONFIG_DRIVER_TI_EMAC - -/* Read ethernet MAC address from EEPROM for DVEVM compatible boards. +/* + * Read ethernet MAC address from EEPROM for DVEVM compatible boards. * Returns 1 if found, 0 otherwise. */ int dvevm_read_mac_address(uint8_t *buf) { #ifdef CONFIG_SYS_I2C_EEPROM_ADDR /* Read MAC address. */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, - (uint8_t *) &buf[0], 6)) + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6)) goto i2cerr;
/* Check that MAC address is valid. */ @@ -70,7 +70,8 @@ int dvevm_read_mac_address(uint8_t *buf) return 1; /* Found */
i2cerr: - printf("Read from EEPROM @ 0x%02x failed\n", CONFIG_SYS_I2C_EEPROM_ADDR); + printf("Read from EEPROM @ 0x%02x failed\n", + CONFIG_SYS_I2C_EEPROM_ADDR); err: #endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
@@ -103,15 +104,16 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr); if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) { - /* There is no MAC address in the environment, so we initialize - * it from the value in the EEPROM. */ + /* + * There is no MAC address in the environment, so we + * initialize it from the value in the EEPROM. + */ debug("### Setting environment from EEPROM MAC address = " ""%pM"\n", env_enetaddr); eth_setenv_enetaddr("ethaddr", rom_enetaddr); } } - #endif /* CONFIG_DRIVER_TI_EMAC */
#if defined(CONFIG_SOC_DA8XX) @@ -122,7 +124,6 @@ void irq_init(void) * Mask all IRQs by clearing the global enable and setting * the enable clear for all the 90 interrupts. */ - writel(0, &davinci_aintc_regs->ger);
writel(0, &davinci_aintc_regs->hier);