This adds skew timing configuration for micrel ksz9021 configuration. With this patch, I can add
#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" #define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 #define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" #define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
to my board's configuration file, and get working networking in u-boot.
Signed-off-by: Pavel Machek pavel@denx.de
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 507b9a3..7e4dbd6 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -117,12 +119,31 @@ static int ksz9021_config(struct phy_device *phydev) { unsigned ctrl1000 = 0; const unsigned master = CTRL1000_PREFER_MASTER | - CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG; + CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG; unsigned features = phydev->drv->features;
+ /* min rx data delay */ + if (ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, + getenv_ulong(CONFIG_KSZ9021_DATA_SKEW_ENV, 16, + CONFIG_KSZ9021_DATA_SKEW_VAL)) < 0) + return -1; + /* min tx data delay */ + if (ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, + getenv_ulong(CONFIG_KSZ9021_DATA_SKEW_ENV, 16, + CONFIG_KSZ9021_DATA_SKEW_VAL)) < 0) + return -1; + /* max rx/tx clock delay, min rx/tx control */ + if (ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, + getenv_ulong(CONFIG_KSZ9021_CLK_SKEW_ENV, 16, + CONFIG_KSZ9021_CLK_SKEW_VAL)) < 0) + return -1; + if (getenv("disable_giga")) features &= ~(SUPPORTED_1000baseT_Half | - SUPPORTED_1000baseT_Full); + SUPPORTED_1000baseT_Full); /* force master mode for 1000BaseT due to chip errata */ if (features & SUPPORTED_1000baseT_Half) ctrl1000 |= ADVERTISE_1000HALF | master;