[U-Boot] [PATCH 1/7] ARM: uniphier: disable cache in SPL of PH1-LD20

The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper.

Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---

arch/arm/mach-uniphier/init/init-ld20.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index 660ad45..7f66053 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -51,5 +51,7 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd)

led_puts("L5");

+ dcache_disable(); + return 0; }