u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6QDL files.
This make syncing Linux dts files straight forward.
Also update the MAINTAINERS file for dts files.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi | 11 +++++++++++ arch/arm/dts/imx6dl-icore-mipi.dts | 1 - arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi | 7 +++++++ arch/arm/dts/imx6dl-icore-u-boot.dtsi | 7 +++++++ arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi | 11 +++++++++++ arch/arm/dts/imx6q-icore-mipi.dts | 1 - arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi | 7 +++++++ arch/arm/dts/imx6q-icore-u-boot.dtsi | 7 +++++++ arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi | 26 ++++++++++++++++++++++++++ arch/arm/dts/imx6qdl-icore-rqs.dtsi | 4 ---- arch/arm/dts/imx6qdl-icore-u-boot.dtsi | 22 ++++++++++++++++++++++ arch/arm/dts/imx6qdl-icore.dtsi | 3 --- arch/arm/dts/imx6qdl-u-boot.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/dts/imx6qdl.dtsi | 5 ----- board/engicam/imx6q/MAINTAINERS | 11 ++++++++++- 15 files changed, 138 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-icore-u-boot.dtsi create mode 100644 arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi create mode 100644 arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi create mode 100644 arch/arm/dts/imx6q-icore-u-boot.dtsi create mode 100644 arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi create mode 100644 arch/arm/dts/imx6qdl-icore-u-boot.dtsi create mode 100644 arch/arm/dts/imx6qdl-u-boot.dtsi
diff --git a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi new file mode 100644 index 0000000000..86e8da761d --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6dl-icore-mipi.dts b/arch/arm/dts/imx6dl-icore-mipi.dts index 3a444c0d98..39bdf2d55b 100644 --- a/arch/arm/dts/imx6dl-icore-mipi.dts +++ b/arch/arm/dts/imx6dl-icore-mipi.dts @@ -16,6 +16,5 @@ };
&usdhc3 { - u-boot,dm-spl; status = "okay"; }; diff --git a/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi new file mode 100644 index 0000000000..210b930264 --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi @@ -0,0 +1,7 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-rqs-u-boot.dtsi" diff --git a/arch/arm/dts/imx6dl-icore-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-u-boot.dtsi new file mode 100644 index 0000000000..5bd3df96f5 --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-u-boot.dtsi @@ -0,0 +1,7 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-u-boot.dtsi" diff --git a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi new file mode 100644 index 0000000000..86e8da761d --- /dev/null +++ b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6q-icore-mipi.dts b/arch/arm/dts/imx6q-icore-mipi.dts index 527f52c886..e7c5616a63 100644 --- a/arch/arm/dts/imx6q-icore-mipi.dts +++ b/arch/arm/dts/imx6q-icore-mipi.dts @@ -16,6 +16,5 @@ };
&usdhc3 { - u-boot,dm-spl; status = "okay"; }; diff --git a/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi new file mode 100644 index 0000000000..210b930264 --- /dev/null +++ b/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi @@ -0,0 +1,7 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-rqs-u-boot.dtsi" diff --git a/arch/arm/dts/imx6q-icore-u-boot.dtsi b/arch/arm/dts/imx6q-icore-u-boot.dtsi new file mode 100644 index 0000000000..5bd3df96f5 --- /dev/null +++ b/arch/arm/dts/imx6q-icore-u-boot.dtsi @@ -0,0 +1,7 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-icore-u-boot.dtsi" diff --git a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi new file mode 100644 index 0000000000..b366a4e0eb --- /dev/null +++ b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-u-boot.dtsi" +#include "imx6qdl-icore-rqs.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; + +&usdhc4 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc3: usdhc3grp { + u-boot,dm-spl; + }; + + pinctrl_usdhc4: usdhc4grp { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 4f7f10203d..d797a034f7 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -105,7 +105,6 @@ };
&usdhc3 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -114,7 +113,6 @@ };
&usdhc4 { - u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc4>; pinctrl-1 = <&pinctrl_usdhc4_100mhz>; @@ -176,7 +174,6 @@ };
pinctrl_usdhc3: usdhc3grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070 @@ -188,7 +185,6 @@ };
pinctrl_usdhc4: usdhc4grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi new file mode 100644 index 0000000000..36def868b0 --- /dev/null +++ b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-u-boot.dtsi" +#include "imx6qdl-icore.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; + }; + + pinctrl_usdhc3: usdhc3grp { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi index 913dc99c54..5eccda800d 100644 --- a/arch/arm/dts/imx6qdl-icore.dtsi +++ b/arch/arm/dts/imx6qdl-icore.dtsi @@ -122,7 +122,6 @@ };
&usdhc1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -221,7 +220,6 @@ };
pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 @@ -233,7 +231,6 @@ };
pinctrl_usdhc3: usdhc3grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi new file mode 100644 index 0000000000..c481bc8c04 --- /dev/null +++ b/arch/arm/dts/imx6qdl-u-boot.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl.dtsi" + +/ { + soc { + u-boot,dm-spl; + + aips-bus@02000000 { + u-boot,dm-spl; + + gpio1: gpio@0209c000 { + u-boot,dm-spl; + }; + + iomuxc: iomuxc@020e0000 { + u-boot,dm-spl; + }; + }; + + aips-bus@02100000 { + u-boot,dm-spl; + + }; + }; +}; diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index e04b57089a..b13b0b2db8 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -77,7 +77,6 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; - u-boot,dm-spl;
dma_apbh: dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -226,7 +225,6 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; - u-boot,dm-spl;
spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -518,7 +516,6 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - u-boot,dm-spl; };
gpio2: gpio@020a0000 { @@ -808,7 +805,6 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; - u-boot,dm-spl; };
ldb: ldb@020e0008 { @@ -893,7 +889,6 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; - u-boot,dm-spl;
crypto: caam@2100000 { compatible = "fsl,sec-v4.0"; diff --git a/board/engicam/imx6q/MAINTAINERS b/board/engicam/imx6q/MAINTAINERS index 71f794586f..eb6f8adf6b 100644 --- a/board/engicam/imx6q/MAINTAINERS +++ b/board/engicam/imx6q/MAINTAINERS @@ -9,12 +9,21 @@ F: configs/imx6dl_icore_nand_defconfig F: configs/imx6qdl_icore_rqs_defconfig F: configs/imx6qdl_icore_mipi_defconfig F: configs/imx6qdl_icore_nand_defconfig +F: arch/arm/dts/imx6qdl.dtsi +F: arch/arm/dts/imx6qdl-u-boot.dtsi F: arch/arm/dts/imx6qdl-icore.dtsi +F: arch/arm/dts/imx6qdl-icore-u-boot.dtsi F: arch/arm/dts/imx6q-icore.dts +F: arch/arm/dts/imx6q-icore-u-boot.dtsi F: arch/arm/dts/imx6dl-icore.dts +F: arch/arm/dts/imx6dl-icore-u-boot.dtsi F: arch/arm/dts/imx6qdl-icore-rqs.dtsi +F: arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi F: arch/arm/dts/imx6q-icore-rqs.dts +F: arch/arm/dts/imx6q-icore-rqs-u-boot.dtis F: arch/arm/dts/imx6dl-icore-rqs.dts +F: arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi F: arch/arm/dts/imx6dl-icore-mipi.dts +F: arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi F: arch/arm/dts/imx6q-icore-mipi.dts -F: arch/arm/dts/imx6qdl-icore.dtsi +F: arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi