These don't relate to booting. Move them out of there and into the same place as the other related settings.
Signed-off-by: Simon Glass sjg@chromium.org ---
Kconfig | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++ boot/Kconfig | 65 ---------------------------------------------------- 2 files changed, 65 insertions(+), 65 deletions(-)
diff --git a/Kconfig b/Kconfig index 0a2e97578dfc..2d4b82149860 100644 --- a/Kconfig +++ b/Kconfig @@ -585,6 +585,71 @@ config MP This provides an option to bringup different processors in multiprocessor cases.
+config HAVE_TEXT_BASE + bool + depends on !NIOS2 && !XTENSA + depends on !EFI_APP + default y + +config TEXT_BASE + depends on HAVE_TEXT_BASE + default 0x0 if POSITION_INDEPENDENT + default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3 + default 0x81700000 if MACH_SUNIV + default 0x2a000000 if MACH_SUN9I + default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 + default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 + hex "Text Base" + help + The address in memory that U-Boot will be running from, initially. + +config HAVE_SYS_MONITOR_BASE + bool + depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \ + || ENV_IS_IN_FLASH || MTD_NOR_FLASH + depends on !EFI_APP + default y + +config SYS_MONITOR_BASE + depends on HAVE_SYS_MONITOR_BASE + hex "Physical start address of boot monitor code" + default TEXT_BASE + help + The physical start address of boot monitor code (which is the same as + CONFIG_TEXT_BASE when linking) and the same as CFG_SYS_FLASH_BASE + when booting from flash. + +config SPL_SYS_MONITOR_BASE + depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE + hex "Physical start address of SPL monitor code" + default SPL_TEXT_BASE + +config TPL_SYS_MONITOR_BASE + depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE + hex "Physical start address of TPL monitor code" + +config DYNAMIC_SYS_CLK_FREQ + bool "Determine CPU clock frequency at run-time" + help + Implement a get_board_sys_clk function that will determine the CPU + clock frequency at run time, rather than define it statically. + +config SYS_CLK_FREQ + depends on !DYNAMIC_SYS_CLK_FREQ + int "CPU clock frequency" + default 125000000 if ARCH_LS1012A + default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \ + ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240 + default 66660000 if ARCH_T2080 + default 33333333 if RCAR_GEN3 + default 24000000 if ARCH_EXYNOS + default 20000000 if RCAR_GEN2 + default 0 + help + A static value for the CPU frequency. Note that if not required + for a given SoC, this can be left at 0. + source "api/Kconfig"
endmenu # General setup diff --git a/boot/Kconfig b/boot/Kconfig index 8343eba10531..02b33323d726 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -690,71 +690,6 @@ config SUPPORT_RAW_INITRD address of the initrd must be augmented by it's size, in the following format: "<initrd address>:<initrd size>".
-config HAVE_TEXT_BASE - bool - depends on !NIOS2 && !XTENSA - depends on !EFI_APP - default y - -config TEXT_BASE - depends on HAVE_TEXT_BASE - default 0x0 if POSITION_INDEPENDENT - default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3 - default 0x81700000 if MACH_SUNIV - default 0x2a000000 if MACH_SUN9I - default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 - default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 - hex "Text Base" - help - The address in memory that U-Boot will be running from, initially. - -config HAVE_SYS_MONITOR_BASE - bool - depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \ - || ENV_IS_IN_FLASH || MTD_NOR_FLASH - depends on !EFI_APP - default y - -config SYS_MONITOR_BASE - depends on HAVE_SYS_MONITOR_BASE - hex "Physical start address of boot monitor code" - default TEXT_BASE - help - The physical start address of boot monitor code (which is the same as - CONFIG_TEXT_BASE when linking) and the same as CFG_SYS_FLASH_BASE - when booting from flash. - -config SPL_SYS_MONITOR_BASE - depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE - hex "Physical start address of SPL monitor code" - default SPL_TEXT_BASE - -config TPL_SYS_MONITOR_BASE - depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE - hex "Physical start address of TPL monitor code" - -config DYNAMIC_SYS_CLK_FREQ - bool "Determine CPU clock frequency at run-time" - help - Implement a get_board_sys_clk function that will determine the CPU - clock frequency at run time, rather than define it statically. - -config SYS_CLK_FREQ - depends on !DYNAMIC_SYS_CLK_FREQ - int "CPU clock frequency" - default 125000000 if ARCH_LS1012A - default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \ - ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 - default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240 - default 66660000 if ARCH_T2080 - default 33333333 if RCAR_GEN3 - default 24000000 if ARCH_EXYNOS - default 20000000 if RCAR_GEN2 - default 0 - help - A static value for the CPU frequency. Note that if not required - for a given SoC, this can be left at 0. - config ARCH_FIXUP_FDT_MEMORY bool "Enable arch_fixup_memory_banks() call" default y