The A80 Optimus Board was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash, 2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- board/sunxi/MAINTAINERS | 5 +++++ configs/A80_Optimus_defconfig | 18 ++++++++++++++++++ 2 files changed, 23 insertions(+) create mode 100644 configs/A80_Optimus_defconfig
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f7129b7d53a5..6e0aa24eb859 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -94,6 +94,11 @@ M: Stefan Mavrodiev stefan.mavrodiev@gmail.com S: Maintained F: configs/A33-OLinuXino_defconfig
+A80 OPTIMUS BOARD +M: Chen-Yu Tsai wens@csie.org +S: Maintained +F: configs/A80_Optimus_defconfig + AINOL AW1 BOARD M: Paul Kocialkowski contact@paulk.fr S: Maintained diff --git a/configs/A80_Optimus_defconfig b/configs/A80_Optimus_defconfig new file mode 100644 index 000000000000..6397de5de5fd --- /dev/null +++ b/configs/A80_Optimus_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN9I=y +CONFIG_DRAM_CLK=672 +CONFIG_MMC0_CD_PIN="PH18" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PH3" +CONFIG_USB1_VBUS_PIN="PH4" +CONFIG_USB3_VBUS_PIN="PH5" +CONFIG_AXP_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_AXP809_POWER=y