Since commit [1] A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as 'bootph-all'.
Move cbass_mcu node to -r5-sk.dts as it is only required for R5 SPL.
[1] 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros rogerq@kernel.org --- arch/arm/dts/k3-am642-r5-sk.dts | 4 ++ arch/arm/dts/k3-am642-sk-u-boot.dtsi | 76 +++++++++++++--------------- 2 files changed, 40 insertions(+), 40 deletions(-)
diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index def4622ff1..daa483a781 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -53,6 +53,10 @@ bootph-pre-ram; };
+&cbass_mcu { + bootph-pre-ram; +}; + &mcu_esm { bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index c277ef8aba..5599977f6c 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -11,129 +11,125 @@ };
memory@80000000 { - bootph-pre-ram; + bootph-all; }; };
&cbass_main{ - bootph-pre-ram; -}; - -&cbass_mcu { - bootph-pre-ram; + bootph-all; };
&main_timer0 { - bootph-pre-ram; + bootph-all; clock-frequency = <200000000>; };
&main_conf { - bootph-pre-ram; + bootph-all; chipid@14 { - bootph-pre-ram; + bootph-all; }; };
&main_pmx0 { - bootph-pre-ram; + bootph-all; };
&main_i2c0_pins_default { - bootph-pre-ram; + bootph-all; };
&main_i2c0 { - bootph-pre-ram; + bootph-all; };
&main_uart0_pins_default { - bootph-pre-ram; + bootph-all; };
&main_uart0 { - bootph-pre-ram; + bootph-all; };
&dmss { - bootph-pre-ram; + bootph-all; };
&secure_proxy_main { - bootph-pre-ram; + bootph-all; };
&dmsc { - bootph-pre-ram; + bootph-all; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - bootph-pre-ram; + bootph-all; }; };
&k3_pds { - bootph-pre-ram; + bootph-all; };
&k3_clks { - bootph-pre-ram; + bootph-all; };
&k3_reset { - bootph-pre-ram; + bootph-all; };
&sdhci0 { status = "disabled"; - bootph-pre-ram; + bootph-all; };
&sdhci1 { - bootph-pre-ram; + bootph-all; };
&main_mmc1_pins_default { - bootph-pre-ram; + bootph-all; };
&cpsw3g { - bootph-pre-ram; + bootph-all;
ethernet-ports { - bootph-pre-ram; + bootph-all; }; };
&cpsw_port2 { - bootph-pre-ram; + bootph-all; };
&main_bcdma { - bootph-pre-ram; + bootph-all; };
&main_pktdma { - bootph-pre-ram; + bootph-all; };
&rgmii1_pins_default { - bootph-pre-ram; + bootph-all; };
&rgmii2_pins_default { - bootph-pre-ram; + bootph-all; };
&mdio1_pins_default { - bootph-pre-ram; + bootph-all; };
&cpsw3g_phy1 { - bootph-pre-ram; + bootph-all; };
&main_usb0_pins_default { - bootph-pre-ram; + bootph-all; };
&serdes_ln_ctrl { @@ -141,25 +137,25 @@ };
&usbss0 { - bootph-pre-ram; + bootph-all; };
&usb0 { - bootph-pre-ram; + bootph-all; };
&serdes_wiz0 { - bootph-pre-ram; + bootph-all; };
&serdes0_usb_link { - bootph-pre-ram; + bootph-all; };
&serdes0 { - bootph-pre-ram; + bootph-all; };
&serdes_refclk { - bootph-pre-ram; + bootph-all; };