Tried fixing NAND support for the at91rm9200dk board; untested. Disabled NAND support in the csb637 board config file.
Signed-off-by: Wolfgang Denk wd@denx.de --- include/asm-arm/arch-at91rm9200/AT91RM9200.h | 4 +++- include/configs/at91rm9200dk.h | 12 ++++-------- include/configs/csb637.h | 13 +++++-------- 3 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 2f7f710..95db017 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -25,6 +25,7 @@ #ifndef AT91RM9200_H #define AT91RM9200_H
+#ifndef __ASSEMBLY__ typedef volatile unsigned int AT91_REG; /* Hardware register definition */
/*****************************************************************************/ @@ -780,4 +781,5 @@ typedef struct _AT91S_PDC #define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */ #define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */
-#endif +#endif /* __ASSEMBLY__ */ +#endif /* AT91RM9200_H */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 951ce16..cd2eae2 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -112,16 +112,11 @@ */ #include <config_cmd_default.h>
-#define CONFIG_CMD_MII #define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND
-#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_LOADS - +#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 @@ -137,6 +132,7 @@ #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
diff --git a/include/configs/csb637.h b/include/configs/csb637.h index e9c6d8e..735a211 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -114,17 +114,11 @@ */ #include <config_cmd_default.h>
-#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_DHCP +#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_PING
-#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_LOADS - +#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 @@ -140,6 +134,7 @@ #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
@@ -155,6 +150,8 @@ #define NAND_CTL_CLRCLE(nandptr) #define NAND_CTL_SETCLE(nandptr)
+#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */ + #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */