Re: [U-Boot] [PATCH v4 09/11] sun5/7i: add an implementation of the psci suspend function

On Tue, May 02, 2017 at 09:04:18AM +0200, Antoine Tenart wrote:

Hi Maxime,

On Mon, May 01, 2017 at 11:13:27PM +0200, Maxime Ripard wrote:

...

On Sun, Apr 30, 2017 at 03:29:54PM +0200, Antoine Tenart wrote:

...

+static void __secure sunxi_clock_enter_idle(struct sunxi_ccm_reg *ccm) +{

• /* switch cpuclk to osc24m */
• clrsetbits_le32(&ccm->cpu_ahb_apb0_cfg, 0x3 << CPU_CLK_SRC_SHIFT,

• 	CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT);
  

• /* disable pll1 */
• clrbits_le32(&ccm->pll1_cfg, CCM_PLL1_CTRL_EN);

+#ifndef CONFIG_MACH_SUN7I

• /*

• * Switch cpuclk to losc. Based on my experience this didn't worked for
  

• * sun7i, hence the ifndef.
  

• */
  

• clrbits_le32(&ccm->cpu_ahb_apb0_cfg, 0x3 << CPU_CLK_SRC_SHIFT);

+#endif

Do we enter idle per-core, or is it a cluster-wide state?

This is cluster-wise, as sunxi_clock_enter_idle() is only called when all CPU are in IDLE state (called the PSCI suspend function). See psci_cpu_suspend().

Hmm, ok. That's still a bit weird. The clock documentation says that you should wait 8 cycles when you reparent, which is something you're not doing. Maybe that can be the issue.

Maxime