Dear Przemyslaw Marczak,
On 19 July 2014 00:29, Przemyslaw Marczak p.marczak@samsung.com wrote:
This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to
800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler
Signed-off-by: Przemyslaw Marczak p.marczak@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Tom Rini trini@ti.com
Changes v2:
- enable fan on odroid U3
Changes v3:
- odroid.c: clean up board name related code
- odroid.c: remove static from set_board_type()
- odroid.c: add implementation of functions: get_dfu_alt_*
- odroid.c: include misc.h
Changes v4:
- odroid.c: dfu_get_alt_boot: add call get_boot_mode()
Changes v5:
- odroid.c: set_board_type: change mdelay to sdelay, define XCL205 GPIO
config
- odroid.c: board_gpio_init(): fix OTG for Odroid U3+
- odroid.c: reserve the last 1 MB of dram for secure firmware
- odroid.c: board_clock_init(): code cleanup
- odroid.c: get_dfu_alt_boot(): remove setenv()
- odroid.c: remove get_board_name() function definition
- odroid.c: add enum ODROID_TYPES
board/samsung/odroid/Makefile | 8 + board/samsung/odroid/odroid.c | 470 ++++++++++++++++++++++++++++++++++++++++++ board/samsung/odroid/setup.h | 255 +++++++++++++++++++++++ 3 files changed, 733 insertions(+) create mode 100644 board/samsung/odroid/Makefile create mode 100644 board/samsung/odroid/odroid.c create mode 100644 board/samsung/odroid/setup.h
diff --git a/board/samsung/odroid/setup.h b/board/samsung/odroid/setup.h new file mode 100644 index 0000000..f6acbff --- /dev/null +++ b/board/samsung/odroid/setup.h @@ -0,0 +1,255 @@ +/*
- Copyright (C) 2014 Samsung Electronics
- Przemyslaw Marczak p.marczak@samsung.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __ODROIDU3_SETUP__ +#define __ODROIDU3_SETUP__
+/* A/M PLL_CON0 */ +#define SDIV(x) (x & 0x7)
In this file, x should be wrapped with (). Please fix it.
+#define PDIV(x) ((x & 0x3f) << 8) +#define MDIV(x) ((x & 0x3ff) << 16) +#define FSEL(x) ((x & 0x1) << 27) +#define PLL_LOCKED_BIT (0x1 << 29) +#define PLL_ENABLE(x) ((x & 0x1) << 31)
+/* CLK_SRC_CPU */ +#define MUX_APLL_SEL(x) (x & 0x1) +#define MUX_CORE_SEL(x) ((x & 0x1) << 16) +#define MUX_HPM_SEL(x) ((x & 0x1) << 20) +#define MUX_MPLL_USER_SEL_C(x) ((x & 0x1) << 24)
Others are looks good to me.
Thanks, Minkyu Kang.