Hi Tim,
On 05/06/2014 12:44, Tim Harvey wrote:
On Wed, May 7, 2014 at 10:24 PM, Tim Harvey tharvey@gateworks.com wrote:
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return instead of configuring the SATA clock and GPR13 registers.
Signed-off-by: Tim Harvey tharvey@gateworks.com
arch/arm/imx-common/sata.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c index 2e69486..c10dd28 100644 --- a/arch/arm/imx-common/sata.c +++ b/arch/arm/imx-common/sata.c @@ -8,13 +8,18 @@ #include <asm/arch/iomux.h> #include <asm/io.h> #include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h>
int setup_sata(void) { struct iomuxc_base_regs *const iomuxc_regs = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
int ret;
int ret = enable_sata_clock();
if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))return 1;ret = enable_sata_clock(); if (ret) return ret;-- 1.8.3.2
Stefano,
Any comments?
No comments. In my queue it is ready-to-be-applied. I will do it after the whole SPL series. My plan is to apply them until the end of the week.
Best regards, Stefano Babic