Hi Pali and Stefan,
-----Original Message----- From: Stefan Roese sr@denx.de Sent: Thursday, July 15, 2021 11:00 To: Pali Rohár pali@kernel.org; Tom Rini trini@konsulko.com Cc: u-boot@lists.denx.de; Marek Behún marek.behun@nic.cz; Kostya Porotchkin kostap@marvell.com Subject: [EXT] Re: [RFC 1/7] ARM: mvebu: a38x: Correct mismatched bound warnings
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Hi Pali, Hi Kosta,
On 14.07.21 22:52, Pali Rohár wrote:
On Monday 03 May 2021 16:48:53 Tom Rini wrote:
With gcc-11 we see: drivers/ddr/marvell/a38x/ddr3_debug.c:672:47: error: argument 2 of type
'u32[5]' {aka 'unsigned int[5]'} with mismatched bound [-Werror=array- parameter=]
672 | int ddr3_tip_read_adll_value(u32 dev_num, u32
pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],
|>> In file included from drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h:10, >> from drivers/ddr/marvell/a38x/ddr3_init.h:17, >> from drivers/ddr/marvell/a38x/ddr3_debug.c:6: >> drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h:116:47: note: >> previously declared as 'u32[]' {aka 'unsigned int[]'} >> >> And similar warnings. Correct these by updating the prototype. >> Remove the prototype for ddr3_tip_read_pup_value as it is unused. >> >> Signed-off-by: Tom Rini <trini@konsulko.com> >> --- >> drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h | 10 +++++++--- >> 1 file changed, 7 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h >> b/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h >> index ab152cb455e9..55832a55405b 100644 >> --- a/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h >> +++ b/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h >> @@ -8,6 +8,7 @@ >> >> #include "ddr3_training_ip.h" >> #include "ddr3_training_ip_db.h" >> +#include "mv_ddr_plat.h" >> >> #define KILLER_PATTERN_LENGTH 32 >> #define EXT_ACCESS_BURST_LENGTH 8 >> @@ -112,9 +113,12 @@ int ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type, >> int ddr3_tip_write_mrs_cmd(u32 dev_num, u32 *cs_mask_arr, enum mr_number mr_num, u32 data, u32 mask); >> int ddr3_tip_write_cs_result(u32 dev_num, u32 offset); >> int ddr3_tip_reset_fifo_ptr(u32 dev_num); -int >> ddr3_tip_read_pup_value(u32 dev_num, u32 pup_values[], int reg_addr, >> u32 mask); -int ddr3_tip_read_adll_value(u32 dev_num, u32 >> pup_values[], u32 reg_addr, u32 mask); -int >> ddr3_tip_write_adll_value(u32 dev_num, u32 pup_values[], u32 >> reg_addr); >> +int ddr3_tip_read_adll_value(u32 dev_num, >> + u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], >> + u32 reg_addr, u32 mask); >> +int ddr3_tip_write_adll_value(u32 dev_num, >> + u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], >> + u32 reg_addr); >> int ddr3_tip_tune_training_params(u32 dev_num, struct >> tune_train_params *params); >> >> #endif /* _DDR3_TRAINING_IP_FLOW_H_ */ > > CC Stefan, Marek, Konstantin > > Could you please send this patch to upstream? > https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_Marvel > lEmbeddedProcessors_mv-2Dddr- 2Dmarvell&d=DwIDaQ&c=nKjWec2b6R0mOyPaz7xt > fQ&r=- N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=uCuiUzuJ- xKl2xMLf1k > 3uSHRcVkxkdrRn7NXczjBNrk&s=IXYIGGlj-Y6Z9-VWGf8iWAiGQAbAYt- 3zROqOhn32Sk > &e= > > Any change done in drivers/ddr/marvell/a38x cause issue in future code > synchronization with upstream repository. Sure. It absolutely makes sense to try to keep these repo's at least a bit in sync. Kosta, could you please apply this patch to your "mv-ddr-marvell" repo as well?
[KP] I am porting this to our development stream and once merged, will issue a patch to Github.
Regards Kosta
Thanks, Stefan