-----Original Message----- From: Alex Marginean alexandru.marginean@nxp.com Sent: Tuesday, December 3, 2019 4:16 PM To: u-boot@lists.denx.de Cc: Priyanka Jain priyanka.jain@nxp.com; Pankaj Bansal pankaj.bansal@nxp.com; Andy Tang andy.tang@nxp.com; Vladimir Oltean vladimir.oltean@nxp.com; Claudiu Manoil claudiu.manoil@nxp.com; Florin Laurentiu Chiculita florinlaurentiu.chiculita@nxp.com; Razvan Ionut Cirjan razvanionut.cirjan@nxp.com; Madalin Bucur madalin.bucur@nxp.com; Alexandru Marginean alexandru.marginean@nxp.com Subject: [PATCH 5/5] arch: armv8: fsl-layerscape: export serdes config to environment
Exports the serdes configuration as an environment variable for LS gen 3 SoCs, so it can be used in u-boot command line. It should particularly be useful for applying Linux DT overlays for the given serdes configuration. This code is called from arch_misc_init and not from the existing serdes_init function because it depends on U-Boot environment being set up.
Signed-off-by: Alex Marginean alexandru.marginean@nxp.com
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++ .../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 43 +++++++++++++++++++ 3 files changed, 58 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f1578b10bc..40cbea0e12 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -241,6 +241,7 @@ config FSL_LSCH2 select SYS_FSL_SEC_BE
config FSL_LSCH3
- select ARCH_MISC_INIT bool
config NXP_LSCH3_2 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c6490556e6..ddbc07037f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1627,3 +1627,17 @@ __weak int dram_init(void)
return 0; }
+#ifdef CONFIG_ARCH_MISC_INIT +__weak int serdes_misc_init(void) +{
- return 0;
+}
+int arch_misc_init(void) +{
- serdes_misc_init();
- return 0;
+} +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index 1a747a9e3d..8b9f5a4e29 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -600,3 +600,46 @@ void fsl_serdes_init(void) serdes3_prtcl_map); #endif }
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int +sd_prctl_shift) {
- struct ccsr_gur __iomem *gur = (void
*)(CONFIG_SYS_FSL_GUTS_ADDR);
- char scfg[16], snum[16];
- int i, cfgr = 0;
- u32 cfg;
- cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
- cfg >>= sd_prctl_shift;
- cfg = serdes_get_number(sd, cfg);
- /* reverse lanes, lane 0 should be printed first */
- for (i = 0; i < SRDS_MAX_LANES; i++)
cfgr |= (cfg >> (i * 4) & 0xf) << (SRDS_MAX_LANES - i - 1) * 4;- snprintf(snum, 16, "serdes%d", sd);
- snprintf(scfg, 16, "%x", cfgr);
- env_set(snum, scfg);
- return 0;
+}
+int serdes_misc_init(void) +{ +#ifdef CONFIG_SYS_FSL_SRDS_1
- serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
FSL_CHASSIS3_SRDS1_PRTCL_MASK,FSL_CHASSIS3_SRDS1_PRTCL_SHIFT); #endif #ifdef
Need new lines in between
+CONFIG_SYS_FSL_SRDS_2
- serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
FSL_CHASSIS3_SRDS2_PRTCL_MASK,FSL_CHASSIS3_SRDS2_PRTCL_SHIFT); #endif #ifdef
Same as above
+CONFIG_SYS_NXP_SRDS_3
- serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
FSL_CHASSIS3_SRDS3_PRTCL_MASK,FSL_CHASSIS3_SRDS3_PRTCL_SHIFT); #endif
Same as above
- return 0;
+}
2.17.1
Priyanka