At BDF address 00:00.0 is fictional device which PCI configuration header is for configuring mpc85xx PCI controller itself. PCI config space of this device has ATMU inbound registers on position of PCI BARs. Trying to do PCI auto configuration of this device cause rewriting ATMU inbound registers. To avoid it, do not allow overwriting registers at BARs positions. And because this device does not have any PCI memory, return zeros when trying to read PCI BARs config space registers. It signals to auto configuration tool to not allocate any PCI memory for this device.
This information is taken from MPC8544E Reference Manual, sections 17.3.1.3, 17.3.1.1.1, 17.3.2 and 17.3.2.11. Available at NXP website: https://www.nxp.com/docs/en/reference-manual/MPC8544ERM.pdf
Signed-off-by: Pali Rohár pali@kernel.org --- drivers/pci/pci_mpc85xx.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index 833de816c459..249cfe66466b 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -27,6 +27,13 @@ static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf, return 0; }
+ /* Skip mpc85xx PCI controller's ATMU inbound registers */ + if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && + (offset & ~3) >= PCI_BASE_ADDRESS_0 && (offset & ~3) <= PCI_BASE_ADDRESS_5) { + *value = 0; + return 0; + } + addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); out_be32(priv->cfg_addr, addr); sync(); @@ -56,6 +63,11 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, if (offset > 0xff) return 0;
+ /* Skip mpc85xx PCI controller's ATMU inbound registers */ + if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && + (offset & ~3) >= PCI_BASE_ADDRESS_0 && (offset & ~3) <= PCI_BASE_ADDRESS_5) + return 0; + addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); out_be32(priv->cfg_addr, addr); sync();