From: Patrice Chotard patrice.chotard@st.com
Signed-off-by: Patrice Chotard patrice.chotard@st.com Reviewed-by: Simon Glass sjg@chromium.org ---
v3 : _ convert previous arch/arm/mach-sti/cpu.c into STi sysreset driver
drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_sti.c | 82 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 drivers/sysreset/sysreset_sti.c
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 37638a8..21bcc21 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o +obj-$(CONFIG_ARCH_STI) += sysreset_sti.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c new file mode 100644 index 0000000..9b58aa8 --- /dev/null +++ b/drivers/sysreset/sysreset_sti.c @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2017 Patrice Chotard patrice.chotard@st.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <sysreset.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct sti_sysreset_priv { + phys_addr_t base; +}; + +static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type) +{ + struct sti_sysreset_priv *priv = dev_get_priv(dev); + + generic_clear_bit(0, (void __iomem *)priv->base); + + return -EINPROGRESS; +} + +static int sti_sysreset_probe(struct udevice *dev) +{ + struct sti_sysreset_priv *priv = dev_get_priv(dev); + struct udevice *syscon; + struct regmap *regmap; + struct fdtdec_phandle_args syscfg_phandle; + int ret; + + /* get corresponding syscon phandle */ + ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev), + "st,syscfg", NULL, 0, 0, + &syscfg_phandle); + if (ret < 0) { + error("Can't get syscfg phandle: %d\n", ret); + return ret; + } + + ret = uclass_get_device_by_of_offset(UCLASS_SYSCON, + syscfg_phandle.node, + &syscon); + if (ret) { + error("%s: uclass_get_device_by_of_offset failed: %d\n", + __func__, ret); + return ret; + } + + regmap = syscon_get_regmap(syscon); + if (!regmap) { + error("unable to get regmap for %s\n", syscon->name); + return -ENODEV; + } + + priv->base = regmap->base; + + return 0; +} + +static struct sysreset_ops sti_sysreset = { + .request = sti_sysreset_request, +}; + +static const struct udevice_id sti_sysreset_ids[] = { + { .compatible = "st,stih407-restart" }, + { } +}; + +U_BOOT_DRIVER(sysreset_sti) = { + .name = "sysreset_sti", + .id = UCLASS_SYSRESET, + .ops = &sti_sysreset, + .probe = sti_sysreset_probe, + .of_match = sti_sysreset_ids, + .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv), +};