Re: [U-Boot] [PATCH] imx: mx6ul: support mx6ul 9x9 evk board

New version V2: https://patchwork.ozlabs.org/patch/514899/

Regards, Peng. On Sun, Sep 06, 2015 at 12:49:21PM +0800, Peng Fan wrote:

This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk, the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are:

1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC.
2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk

supports 512MB DDR3 3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package.

This patch add the following:

1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size()
2. Introduce a macro is_mx6ul_9x9_evk using

CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work, so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with mx6ul_14x14_evk. And we have no way to dymaically checking this chip is 9x9 or 14x14. 3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations. POWER related configurations also effect for mx6ul_14x14_evk. But power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk. 4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM configurations. 5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file according to board_rev and board_name. 6. Add TARGET_MX6UL_9X9_EVK Kconfig entry

Boot Log: U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53) reading u-boot.img reading u-boot.img

U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800)

CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 41C Reset cause: POR Board: MX6UL 9x9 EVK I2C: ready DRAM: 256 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: FEC1 Hit any key to stop autoboot: 0

Signed-off-by: Peng Fan Peng.Fan@freescale.com Cc: Stefano Babic sbabic@denx.de

---

arch/arm/cpu/armv7/mx6/Kconfig | 8 + board/freescale/mx6ul_14x14_evk/Kconfig | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 183 ++++++++++++++++++---- configs/mx6ul_9x9_evk_defconfig | 8 + include/configs/imx6_spl.h | 1 + include/configs/mx6ul_14x14_evk.h | 26 ++- 6 files changed, 191 insertions(+), 37 deletions(-) create mode 100644 configs/mx6ul_9x9_evk_defconfig

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 8b0120f..b3f7eaf 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -104,6 +104,14 @@ config TARGET_MX6SXSABRESD select DM select DM_THERMAL

+config TARGET_MX6UL_9X9_EVK

• bool "mx6ul_9x9_evk"
• select MX6UL
• select CPU_V7
• select DM
• select DM_THERMAL
• select SUPPORT_SPL

config TARGET_MX6UL_14X14_EVK bool "mx6ul_14x14_evk" select MX6UL diff --git a/board/freescale/mx6ul_14x14_evk/Kconfig b/board/freescale/mx6ul_14x14_evk/Kconfig index 393aca6..eda02c9 100644 --- a/board/freescale/mx6ul_14x14_evk/Kconfig +++ b/board/freescale/mx6ul_14x14_evk/Kconfig @@ -1,4 +1,4 @@ -if TARGET_MX6UL_14X14_EVK +if TARGET_MX6UL_14X14_EVK || TARGET_MX6UL_9X9_EVK

config SYS_BOARD default "mx6ul_14x14_evk" diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index c09d84e..612fb78 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -23,6 +23,9 @@ #include <linux/sizes.h> #include <mmc.h> #include <netdev.h> +#include <power/pmic.h> +#include <power/pfuze3000_pmic.h> +#include "../common/pfuze.h" #include <usb.h> #include <usb/ehci-fsl.h>

@@ -210,11 +213,56 @@ struct i2c_pads_info i2c_pad_info1 = { .gp = IMX_GPIO_NR(1, 29), }, };

+#ifdef CONFIG_POWER +#define I2C_PMIC 0 +int power_init_board(void) +{

• if (is_mx6ul_9x9_evk()) {

• struct pmic *pfuze;
  

• int ret;
  

• unsigned int reg, rev_id;
  

• ret = power_pfuze3000_init(I2C_PMIC);
  

• if (ret)
  

• 	return ret;
  

• pfuze = pmic_get("PFUZE3000");
  

• ret = pmic_probe(pfuze);
  

• if (ret)
  

• 	return ret;
  

• pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg);
  

• pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
  

• printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n",
  

•        reg, rev_id);
  

• /* disable Low Power Mode during standby mode */
  

• pmic_reg_read(pfuze, PFUZE3000_LDOGCTL, &reg);
  

• reg |= 0x1;
  

• pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, reg);
  

• /* SW1B step ramp up time from 2us to 4us/25mV */
  

• reg = 0x40;
  

• pmic_reg_write(pfuze, PFUZE3000_SW1BCONF, reg);
  

• /* SW1B mode to APS/PFM */
  

• reg = 0xc;
  

• pmic_reg_write(pfuze, PFUZE3000_SW1BMODE, reg);
  

• /* SW1B standby voltage set to 0.975V */
  

• reg = 0xb;
  

• pmic_reg_write(pfuze, PFUZE3000_SW1BSTBY, reg);
  

• }
• return 0;

+} +#endif #endif

int dram_init(void) {

• gd->ram_size = PHYS_SDRAM_SIZE;

• gd->ram_size = imx_ddr_size();

  return 0;

} @@ -614,6 +662,15 @@ int board_late_init(void) add_board_boot_modes(board_boot_modes); #endif

+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

• setenv("board_name", "EVK");
• if (is_mx6ul_9x9_evk())

• setenv("board_rev", "9X9");
  

• else

• setenv("board_rev", "14X14");
  

+#endif

• return 0;

}

@@ -624,7 +681,10 @@ u32 get_board_rev(void)

int checkboard(void) {

• puts("Board: MX6UL 14x14 EVK\n");

• if (is_mx6ul_9x9_evk())

• puts("Board: MX6UL 9x9 EVK\n");
  

• else

• puts("Board: MX6UL 14x14 EVK\n");
  
  

  return 0;

} @@ -634,7 +694,76 @@ int checkboard(void) #include <spl.h> #include <asm/arch/mx6-ddr.h>

-const struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {

+static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {

• .grp_addds = 0x00000030,
• .grp_ddrmode_ctl = 0x00020000,
• .grp_b0ds = 0x00000030,
• .grp_ctlds = 0x00000030,
• .grp_b1ds = 0x00000030,
• .grp_ddrpke = 0x00000000,
• .grp_ddrmode = 0x00020000,

+#ifdef CONFIG_TARGET_MX6UL_9X9_EVK

• .grp_ddr_type = 0x00080000,

+#else

• .grp_ddr_type = 0x000c0000,

+#endif +};

+#ifdef CONFIG_TARGET_MX6UL_9X9_EVK +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {

• .dram_dqm0 = 0x00000030,
• .dram_dqm1 = 0x00000030,
• .dram_ras = 0x00000030,
• .dram_cas = 0x00000030,
• .dram_odt0 = 0x00000000,
• .dram_odt1 = 0x00000000,
• .dram_sdba2 = 0x00000000,
• .dram_sdclk_0 = 0x00000030,
• .dram_sdqs0 = 0x00003030,
• .dram_sdqs1 = 0x00003030,
• .dram_reset = 0x00000030,

+};

+static struct mx6_mmdc_calibration mx6_mmcd_calib = {

• .p0_mpwldectrl0 = 0x00000000,
• .p0_mpdgctrl0 = 0x20000000,
• .p0_mprddlctl = 0x4040484f,
• .p0_mpwrdlctl = 0x40405247,
• .mpzqlp2ctl = 0x1b4700c7,

+};

+static struct mx6_lpddr2_cfg mem_ddr = {

• .mem_speed = 800,
• .density = 2,
• .width = 16,
• .banks = 4,
• .rowaddr = 14,
• .coladdr = 10,
• .trcd_lp = 1500,
• .trppb_lp = 1500,
• .trpab_lp = 2000,
• .trasmin = 4250,

+};

+struct mx6_ddr_sysinfo ddr_sysinfo = {

• .dsize = 0,
• .cs_density = 18,
• .ncs = 1,
• .cs1_mirror = 0,
• .walat = 0,
• .ralat = 5,
• .mif3_mode = 3,
• .bi_on = 1,
• .rtt_wr = 0, /* LPDDR2 does not need rtt_wr rtt_nom */
• .rtt_nom = 0,
• .sde_to_rst = 0, /* LPDDR2 does not need this field */
• .rst_to_cke = 0x10, /* JEDEC value for LPDDR2: 200us */
• .ddr_type = DDR_TYPE_LPDDR2,

+};

+#else +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { .dram_dqm0 = 0x00000030, .dram_dqm1 = 0x00000030, .dram_ras = 0x00000030, @@ -648,24 +777,29 @@ const struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { .dram_reset = 0x00000030, };

-const struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {

• .grp_addds = 0x00000030,
• .grp_ddrmode_ctl = 0x00020000,
• .grp_b0ds = 0x00000030,
• .grp_ctlds = 0x00000030,
• .grp_b1ds = 0x00000030,
• .grp_ddrpke = 0x00000000,
• .grp_ddrmode = 0x00020000,
• .grp_ddr_type = 0x000c0000,

-};

-const struct mx6_mmdc_calibration mx6_mmcd_calib = { +static struct mx6_mmdc_calibration mx6_mmcd_calib = { .p0_mpwldectrl0 = 0x00070007, .p0_mpdgctrl0 = 0x41490145, .p0_mprddlctl = 0x40404546, .p0_mpwrdlctl = 0x4040524D, };

+struct mx6_ddr_sysinfo ddr_sysinfo = {

• .dsize = 0,
• .cs_density = 20,
• .ncs = 1,
• .cs1_mirror = 0,
• .rtt_wr = 2,
• .rtt_nom = 1, /* RTT_Nom = RZQ/2 */
• .walat = 1, /* Write additional latency */
• .ralat = 5, /* Read additional latency */
• .mif3_mode = 3, /* Command prediction working mode */
• .bi_on = 1, /* Bank interleaving enabled */
• .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
• .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
• .ddr_type = DDR_TYPE_DDR3,

+};

static struct mx6_ddr3_cfg mem_ddr = { .mem_speed = 800, .density = 4, @@ -678,6 +812,7 @@ static struct mx6_ddr3_cfg mem_ddr = { .trcmin = 4875, .trasmin = 3500, }; +#endif

static void ccgr_init(void) { @@ -695,24 +830,8 @@ static void ccgr_init(void)

static void spl_dram_init(void) {

• struct mx6_ddr_sysinfo sysinfo = {

• .dsize = 0,
  

• .cs_density = 20,
  

• .ncs = 1,
  

• .cs1_mirror = 0,
  

• .rtt_wr = 2,
  

• .rtt_nom = 1,		/* RTT_Nom = RZQ/2 */
  

• .walat = 1,		/* Write additional latency */
  

• .ralat = 5,		/* Read additional latency */
  

• .mif3_mode = 3,		/* Command prediction working mode */
  

• .bi_on = 1,		/* Bank interleaving enabled */
  

• .sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
  

• .rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
  

• .ddr_type = DDR_TYPE_DDR3,
  

• };
• mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
• mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);

• mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);

}

void board_init_f(ulong dummy) diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig new file mode 100644 index 0000000..e54609d --- /dev/null +++ b/configs/mx6ul_9x9_evk_defconfig @@ -0,0 +1,8 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg" +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_TARGET_MX6UL_9X9_EVK=y +CONFIG_SPL=y +CONFIG_CMD_NET=y +CONFIG_CMD_PING=y +CONFIG_CMD_DHCP=y diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 1744f2c..82ec798 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -10,6 +10,7 @@ #ifdef CONFIG_SPL

#define CONFIG_SPL_FRAMEWORK +#include <linux/kconfig.h>

/*

• see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals:

diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 4a2280b..4d4db69 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -14,12 +14,16 @@ #include "mx6_common.h" #include <asm/imx-common/gpio.h>

+#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)

/* SPL options */ #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT #include "imx6_spl.h"

+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

#define CONFIG_ROM_UNIFIED_SECTIONS #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO @@ -66,9 +70,13 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 -#endif

-#define PHYS_SDRAM_SIZE SZ_512M +/* PMIC only for 9X9 EVK */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE3000 +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#endif

#undef CONFIG_CMD_IMLS

@@ -80,7 +88,7 @@ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \

• "fdt_file=imx6ul-14x14-evk.dtb\0" \

• "fdt_file=undefined\0" \ "fdt_addr=0x83000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \

@@ -134,9 +142,19 @@ "fi; " \ "else " \ "bootz; " \

• "fi;\0"
  

• "fi;\0" \
  

• "findfdt="\
  

• 	"if test $fdt_file = undefined; then " \
  

• 		"if test $board_name = EVK && test $board_rev = 9X9; then " \
  

• 			"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
  

• 		"if test $board_name = EVK && test $board_rev = 14X14; then " \
  

• 			"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
  

• 		"if test $fdt_file = undefined; then " \
  

• 			"echo WARNING: Could not determine dtb to use; fi; " \
  

• 	"fi;\0" \
  
  

#define CONFIG_BOOTCOMMAND \

•   "run findfdt;" \
  "mmc dev ${mmcdev};" \
  "mmc dev ${mmcdev}; if mmc rescan; then " \
   "if run loadbootscript; then " \
  

-- 1.8.4

--