Hi Steven,
On Tuesday 04 November 2008, 조기성 wrote:
I solved SDRAM problems for your help, when I use CFG_DRAM_TEST , it passed
My bdi2000's configuration is blows WDCR 0x10 0x00000020 ;Select SDRAM0_CFG0 WDCR 0x11 0x34000000 ;CFG0: 32bit, PMU disable WDCR 0x11 0x84000000 ;CFG1: enable SDRA
When I Use BID2000, accessing SDRAM with Verify, mm command, It works fine . I think SDRAM0_CFG first is CFG0, and second is CFG1.
But in board/amcc/mft.c I used marked code, It's confused me. Long int sdram_init() {
//mtsdram (mem_cfg0, 0x34000000); /* confused me */ //mtsdram (mem_cfg1, 0x84000000); mtsdram (mem_cfg1, 0x34000000);/* it works fine */ mtsdram (mem_cfg0, 0x84000000); }
Not sure if I understand what you are trying to tell me? Did you find a problem in the common code? Or is it a problem with your BDI config script?
I have another problem. cpu/ppc4XX/start.S -> trab_init function has exception error blows LOG MESSAGE. When I debug trap_init , use blr code it succefully returned. maybe you can point me to the right direction.
trap_init: lwz r7, GOT(_start_of_vectors) lwz r8, GOT(_end_of_vectors)
li r9, 0x100 /* reset vector always at 0x100 */
cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */
mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) addi r7, r7, 4 addi r9, r9, 4 cmplw 0, r7, r8 bne 1b
/* blr (in this use blr it works Steven) */
So when you add this "blr" here you can boot successfully to the U-Boot prompt? And without it you get the exceptions printed below? That's strange. It works on all other known 4xx platforms without problem as far as I know.
Make sure to start "fresh" from the BDI by using "reset run".
Best regards, Stefan
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