Hi Stephen,
2016-02-16 17:39 GMT+01:00 Stephen Warren swarren@wwwdotorg.org:
On 02/16/2016 09:04 AM, Michal Simek wrote:
Hi Heiko,
On 16.2.2016 14:32, Heiko Schocher wrote:
Hello Michal,
Am 16.02.2016 um 13:12 schrieb Michal Simek:
Hi Stephen,
trying to run the latest testing on zynq board and getting this main_signon error.
This is what I am running ./test/py/test.py --bd zynq_zc702 --build --board-identity zc702 and getting below.
Does this board has SPL support without SPL serial output?
I do load u-boot via jtag that's why SPL logs are not visible.
If so, can you try my patch:
I have applied your patch but it is still not working.
If I run full flow with SPL then I can't see any issue.
I assume this is resolved then?
Unfortunately both cases should work because SPL is not only one first stage bootloader which can be used. I didn't test zynqmp but there is no SPL and the same problem is probably there too. Or is there any dependency that if SPL is not build than testing system is not expecting it?
I will look tmr at jtag boot mode with SPL if I can get it work.
Thanks, Michal