Hello Nick,
Nick Thompson wrote:
On 30/07/10 10:32, Heiko Schocher wrote:
Nick Thompson wrote:
On 29/07/10 11:45, Heiko Schocher wrote:
i++) {page_table[i] = i << 20 | (3 << 10) | 0x1e;These numbers ought to be defines, no?
The 0x1e will not work on da8xx as the data cache is broken. The d-cache can still be used in write back mode, so the value 0x1a should be used. It would
Here, I should have said write-thru' can still be used...
be good to have symbols to define the caching modes: none, wr-thru', wr-back or some such, similar to Linux.
Ah, Ok, good hint!
What with:
if !defined(CONFIG_SYS_ARM_CACHE_SETUP) #define CONFIG_SYS_ARM_CACHE_SETUP 0x1e #endif
page_table[i] = i << 20 | (3 << 10) | CONFIG_SYS_ARM_CACHE_SETUP;So boards/architectures can define there own values?
How about:
#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) #define CACHE_SETUP 0x1a #else #define CACHE_SETUP 0x1e #endif
page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;This would avoid people having to look up the appropriate value(s).
Ok, I am fine with that too.
This follows the Linux model, but there the symbol CPU_CACHE_WRITETHROUGH is used. Ideally, I would suggest we use the CPU form as well, but it would imply an effect beyond ARM.
I vote for CONFIG_SYS_ARM_CACHE_WRITETHROUGH
bye, Heiko