Hi Simon,
On 04/18/2019 12:32 PM, Simon Glass wrote:
Hi Kever,
On Mon, 1 Apr 2019 at 02:21, Kever Yang kever.yang@rock-chips.com wrote:
Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs.
So this means that TPL inits SDRAM? That seems strange to me...why have SPL at all, then? What is SPL supported to do on RK3399 platforms?
The model is: TPL's code in SRAM, load by BOOTROM, EL3 mode(armv8) ,and focus at DDR SDRAM init, have code size limit by SRAM; SPL's code in DDR, load by BOOTROM, EL3 mode(armv8), and main feature is: - parse and load trust, eg, bl31, bl32, op-tee, which need to before U-Boot; - parse and load firmware for next stage, eg. u-boot, kernel; U-Boot proper code in DDR, load by SPL, EL2 mode(armv8), full feature;
and we may add features like below for SPL: - secure verify for u-boot.itb; - relocate to support bl31 better; - boot kernel in falcon mode directly from SPL; - implement usb download mode(rockusb) in case u-boot is broken; - enable partition support to support A/B system for U-Boot; - more storage driver support at the same time other than mmc, eg. spi, nand;
This model can apply to all Rockchip SoCs, eg, rk3229(patch in list) and rk3288(vyasa) already use this model. RK3399 has bigger SRAM, but it still may have problem to meet the SIZE limit with only one SPL(no TPL) mode, eg. for lpddr4, we need 3 copy of different frequency parameters to init lpddr4, and space available for other driver is be much smaller.
Does this make sense to you?
Thanks, - Kever
Regards, Simon
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Kconfig | 34 ++++++++- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3399-board-tpl.c | 84 +++++++++++++++++++++++ include/configs/rk3399_common.h | 9 +++ 4 files changed, 127 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-rockchip/rk3399-board-tpl.c