
Hi Patrick,
[Adding Troy, NXP U-Boot folks and Stefano]
Thanks for your contribution.
On Tue, Oct 1, 2019 at 4:15 PM Patrick Wildt patrick@blueri.se wrote:
This adds basic support for the Nitrogen8M board. It's based on the NXP i.MX8MQ and provides 2GB of memory. This code has been based on the i.MX8M EVK board support, and Boundary Devices' git repository. So far the eMMC and onboard Ethernet can be used to boot, with more device support yet to be implemented. Please note that this only supports the 2G version, with 1 rank bit, which is Boundary Devices' "nitrogen8m" defconfig as well.
Signed-off-by: Patrick Wildt patrick@blueri.se
+/ {
model = "Boundary Devices i.MX8MQ Nitrogen8M";
compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq";
chosen {
bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
};
This earlycon part should be removed.
/* P1 400mts 1D */
.drate = 400,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = lpddr4_fsp1_cfg,
.fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg),
},
+#if 0
No if 0 please.
+static int setup_fec(void) +{
struct iomuxc_gpr_base_regs *gpr =
(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
/* Pull PHY into reset */
gpio_request(IMX_GPIO_NR(1, 9), "fec1_rst");
gpio_direction_output(IMX_GPIO_NR(1, 9), 0);
/* Set bootstrap pins for AR8035 */
gpio_request(IMX_GPIO_NR(1, 26), "fec1_rd0");
gpio_direction_output(IMX_GPIO_NR(1, 26), 0);
gpio_request(IMX_GPIO_NR(1, 27), "fec1_rd1");
gpio_direction_output(IMX_GPIO_NR(1, 27), 0);
gpio_request(IMX_GPIO_NR(1, 28), "fec1_rd2");
gpio_direction_output(IMX_GPIO_NR(1, 28), 0);
gpio_request(IMX_GPIO_NR(1, 29), "fec1_rd3");
gpio_direction_output(IMX_GPIO_NR(1, 29), 1);
gpio_request(IMX_GPIO_NR(1, 24), "fec1_rx_ctl");
gpio_direction_output(IMX_GPIO_NR(1, 24), 0);
gpio_request(IMX_GPIO_NR(1, 25), "fec1_rxc");
gpio_direction_output(IMX_GPIO_NR(1, 25), 1);
imx_iomux_v3_setup_multiple_pads(fec1_strap_pads,
ARRAY_SIZE(fec1_strap_pads));
There is DM support from the FEC, so no need to have all this board code.
/*
* 9e (1e = 30) default .9 V
* 0.6V to 1.23V in 10 MV steps
These commands look too cryptic.
*/
/* Enable I2C1A, ARM/DRAM */
i2c_write(I2C_MUX_ADDR, 1, 1, NULL, 0);
/*
* .6 + .40 = 1.00
*/
val8 = 0x80 + 40;
Please add defines for these values.