10 Aug
2017
10 Aug
'17
5:43 p.m.
On 07/17/2017 08:45 PM, Zhiqiang Hou wrote:
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add LS2088A series SoC pcie support), which only updated cfg_res.start and did not update the .end field, this will make fdt_resource_size() getting wrong value when calculate the cfg1 space address. This patch is to fix the bug.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Revised subject and commit message slightly. Applied to fsl-qoriq master, awaiting upstream. Thanks.
York