
Hello,
I have a custom i.MX6 board that is configured to boot from 16-bit parallel NOR flash using non-multiplexed I/O with the data on the upper half of the data bus. I.e. chip select 0 of the EIM bus should be configured so that MUM = 0 and DSZ = 010b.
However, the board is coming out of reset (using a BDI3000) with MUM = 1 and DSZ = 001b so multiplexed I/O with the data on the lower half of the data bus. According to the EIM multiplexing table, this isn't even a valid configuration.
Further, if I change the EIM_CS0GCR1 register (using the BDI) to force MUM = 0 and DSZ = 010b, then read from the flash, I can see the correct data on the bus using a logic analyzer but the BDI always returns 0.
Does anyone have any suggestions? Has anyone successfully booted from parallel NOR flash?
Thanks, Carolyn