On Fri, Mar 16, 2018 at 9:14 AM, Lokesh Vutla lokeshvutla@ti.com wrote:
On Friday 16 March 2018 02:36 PM, Alex Kiernan wrote:
I was looking at the differences between the TI U-Boot tree and the upstream tree (as we've switched from one to the other) and I think the only patch which I'm picking locally which isn't in upstream is this one:
[U-Boot,RFC,3/3] spl: Add support for enabling dcache
https://patchwork.ozlabs.org/patch/699899/
As far as I can tell the other two patches in the series were applied, just not this one and I can't see what the changes that were requested were.
Since this is affecting all the available SoCs, we have to make sure that it does not break any existing platforms. Tom reported that it broke few platforms.
I wonder if some of those are the kind of breakage we saw - SPL randomly hangs after SDRAM is configured. Our fix was a highly (un-)scientific mdelay(5) at the bottom of sdram_init(), which had the added benefit of fixing other random hangs we'd previously failed to get to the bottom of.
When we first had that change it did cause us some problems, but only because we needed some settle time once the DDR clocks were configured.
How do we get it back reconsidered for merging?
May be I should create a separate kconfig entry and guard all the code with it? So it can be enabled as necessary.
That'd work for me! Though I guess the fewer guards/options we have the better.